SLVS754D March   2007  – January 2015 TPS65053

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Ratings
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
        1. 7.3.1.1 Dynamic Voltage Positioning
        2. 7.3.1.2 Soft Start
        3. 7.3.1.3 100% Duty Cycle Low Dropout Operation
        4. 7.3.1.4 Undervoltage Lockout
      2. 7.3.2 Mode Selection
      3. 7.3.3 Enable
      4. 7.3.4 Dynamic Ouput Voltage Scaling
      5. 7.3.5 RESET on the TPS65053x
      6. 7.3.6 RESET Generation and Output Monitoring on the TPS65058
      7. 7.3.7 Short-Circuit Protection
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 DCDC Output Voltage Setting
        2. 8.2.2.2 LDO Output Voltage Setting
        3. 8.2.2.3 Low Dropout Voltage Regulators
        4. 8.2.2.4 DCDC Output Filter Design (Inductor and Output Capacitor)
          1. 8.2.2.4.1 Inductor Selection
          2. 8.2.2.4.2 Output Capacitor Selection
        5. 8.2.2.5 DCDC Input Capacitor Selection
        6. 8.2.2.6 Sequencing and Output Logic Signal RESET
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Links
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

4 Revision History

Changes from C Revision (June 2009) to D Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo

Changes from B Revision (February 2008) to C Revision

  • Changed devices TPS650531 and TPS650532 to the Features and Ordering Information table.Go

Changes from A Revision (September 2007) to B Revision

  • Changed the Functional Block Diagram - DCDC1 (I/O) Step-Down Converter From: 600 mA To: 1000 mA.Go

Changes from * Revision (March 2007) to A Revision

  • Added Output voltage range for LDO1, LDO2 and LDO3 to the Abs Max tableGo
  • Changed Output voltage range for LDO1 and LDO2 In the ROC table From: Max = VINLDO1, VINLDO2 To: 3.6VGo