SLVS861F august   2008  – june 2020 TPS40210-Q1 , TPS40211-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     4
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Minimum On-Time and Off-Time Considerations
      2. 7.3.2  Current Sense and Overcurrent
      3. 7.3.3  Current Sense and Subharmonic Instability
      4. 7.3.4  Current Sense Filtering
      5. 7.3.5  Soft Start
      6. 7.3.6  BP Regulator
      7. 7.3.7  Shutdown (DIS/ EN Pin)
      8. 7.3.8  Control Loop Considerations
      9. 7.3.9  Gate Drive Circuit
      10. 7.3.10 TPS40211-Q1
    4. 7.4 Device Functional Modes
      1. 7.4.1 Setting the Oscillator Frequency
      2. 7.4.2 Synchronizing the Oscillator
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Duty Cycle Estimation
        2. 8.2.2.2  Inductor Selection
        3. 8.2.2.3  Rectifier Diode Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Current Sense and Current Limit
        7. 8.2.2.7  Current Sense Filter
        8. 8.2.2.8  Switching MOSFET Selection
        9. 8.2.2.9  Feedback Divider Resistors
        10. 8.2.2.10 Error Amplifier Compensation
        11. 8.2.2.11 R-C Oscillator
        12. 8.2.2.12 Soft-Start Capacitor
        13. 8.2.2.13 Regulator Bypass
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Support Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1.     69

8.2.1 Design Requirements

Table 8-1 TPS40210-Q1 Design Example Requirements
PARAMETER CONDITIONS MIN NOM MAX UNIT
INPUT CHARACTERISTICS
VIN Input voltage 8 12 14 V
IIN Input current 4.4 A
No load input current 0.05
VIN(UVLO) Input undervoltage lockout 4.5 V
OUTPUT CHARACTERISTICS
VOUT Output voltage 23.5 24.0 24.5 V
Line regulation 1%
Load regulation 1%
VOUT(ripple) Output voltage ripple 500 mVPP
IOUT Output current 8 V ≤ VIN ≤ 14 V 0.2 1 2 A
IOCP Output overcurrent inception point 3.5
Transient response
ΔI Load step 1 A
Load slew rate 1 A/μs
Overshoot threshold voltage 500 mV
Settling time 5 ms
SYSTEM CHARACTERISTICS
fSW Switching frequency 600 kHz
ηPK Peak efficiency VIN = 12 V, 0.2 A ≤ IOUT ≤ 2 A 95%
η Full load efficiency VIN = 12 V, IOUT = 2 A 94%
TOP Operating temperature range 10 V ≤ VIN ≤ 14 V, 0.2 A ≤ IOUT ≤ 2 A 25 °C
MECHANICAL DIMENSIONS
W Width 1.5 in
L Length 1.5
h Height 0.5