SLVSB69C June   2012  – September 2021 TPS54719

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency PWM Control
      2. 7.3.2 Slope Compensation And Output Current
      3. 7.3.3 Bootstrap Voltage (Boot) And Low Dropout Operation
      4. 7.3.4 Error Amplifier
      5. 7.3.5 Voltage Reference
      6. 7.3.6 Adjusting The Output Voltage
      7. 7.3.7 Enable and Adjusting Undervoltage Lockout
      8. 7.3.8 Slow Start/Tracking Pin
      9. 7.3.9 Sequencing
    4. 7.4 Device Functional Modes
      1. 7.4.1  Constant Switching Frequency And Timing Resistor (RT Pin)
      2. 7.4.2  Overcurrent Protection
      3. 7.4.3  Frequency Shift
      4. 7.4.4  Reverse Overcurrent Protection
      5. 7.4.5  Power Good (PWRGD Pin)
      6. 7.4.6  Overvoltage Transient Protection
      7. 7.4.7  Thermal Shutdown
      8. 7.4.8  Small Signal Model For Loop Response
      9. 7.4.9  Simple Small Signal Model For Peak Current Mode Control
      10. 7.4.10 Small Signal Model For Frequency Compensation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 High Frequency, 1.8-V Output Power Supply Design With Adjusted UVLO
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Selecting The Switching Frequency
        2. 8.2.3.2 Output Inductor Selection
        3. 8.2.3.3 Output Capacitor
        4. 8.2.3.4 Input Capacitor
        5. 8.2.3.5 Slow-Start Capacitor
        6. 8.2.3.6 Bootstrap Capacitor Selection
        7. 8.2.3.7 Undervoltage Lockout Set Point
        8. 8.2.3.8 Output Voltage And Feedback Resistors Selection
        9. 8.2.3.9 Compensation
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Power Dissipation Estimate
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.3.3 Bootstrap Voltage (Boot) And Low Dropout Operation

The TPS54719 has an integrated boot regulator and requires a small ceramic capacitor between the BOOT and PH pin to provide the gate drive voltage for the high-side MOSFET. The value of the ceramic capacitor should be 0.1 μF. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10 V or higher is recommended because of the stable characteristics over temperature and voltage.

To improve dropout, the TPS54719 is designed to operate at 100% duty cycle as long as the BOOT to PH pin voltage is greater than 2.1 V, typically. The high-side MOSFET is turned off using an UVLO circuit, allowing for the low-side MOSFET to conduct when the voltage from BOOT to PH drops below 2.1 V. Since the supply current sourced from the BOOT pin is very low, the high-side MOSFET can remain on for more switching cycles than are required to refresh the capacitor, thus the effective duty cycle of the switching regulator is very high.