SLVSF65A December   2020  – May 2021 TPS92633-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply (SUPPLY)
        1. 7.3.1.1 Power-On Reset
        2. 7.3.1.2 Supply Current in Fault Mode
      2. 7.3.2  Enable and Shutdown (EN)
      3. 7.3.3  Reference Current (IREF)
      4. 7.3.4  Constant-Current Output and Setting (INx)
      5. 7.3.5  Analog Current Control (ICTRL)
        1. 7.3.5.1 Off-Board Brightness Binning Resistor
        2. 7.3.5.2 NTC Resistor
      6. 7.3.6  Thermal Sharing Resistor (OUTx and RESx)
      7. 7.3.7  PWM Control (PWMx)
      8. 7.3.8  Supply Control
      9. 7.3.9  Diagnostics
        1. 7.3.9.1 IREF Short-to-GND Detection
        2. 7.3.9.2 IREF Open Detection
        3. 7.3.9.3 LED Short-to-GND Detection
        4. 7.3.9.4 LED Open-Circuit Detection
        5. 7.3.9.5 Single LED Short-Circuit Detection (SLS_REF)
        6. 7.3.9.6 LED Open-Circuit and Single LED Short-Circuit Detection Enable (DIAGEN)
        7. 7.3.9.7 Low Dropout Operation
        8. 7.3.9.8 Over-Temperature Protection
      10. 7.3.10 FAULT Bus Output With One-Fails–All-Fail
      11. 7.3.11 FAULT Table
      12. 7.3.12 LED Fault Summary
      13. 7.3.13 IO Pins Inner Connection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Undervoltage Lockout, V(SUPPLY) < V(POR_rising)
      2. 7.4.2 Normal Operation V(SUPPLY) ≥ 4.5 V
      3. 7.4.3 Low-Voltage Dropout Operation
      4. 7.4.4 Fault Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 BCM Controlled Rear Lamp with One-Fails-All-Fail Setup
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Independent PWM Controlled Rear Lamp with Off Board LED and Binning Resistor
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1)
HBM ESD Classification Level		 ±2000 V
Charged-device model (CDM), per AEC Q100-011
CDM ESD Classification Level		 All pins ±500
Corner pins (SUPPLY, RES1, FAULT, ICTRL) ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.