SLVSGZ1A May 2024 – July 2024 DRV8161 , DRV8162
ADVANCE INFORMATION
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
VGVDD | Power supply voltage | GVDD, GVDD_LS | 8 | 20 | V | |
Power supply voltage (DRV8162L only) | GVDD, GVDD_LS, DRV8162L device variant | 5 | V | |||
VGVDD-SL | Power supply voltage with respect to SL | GVDD(DRV8161), GVDD_LS (DRV8162x) for low-side Pre-Driver PWM operation | 3.5 | V | ||
VVDRAIN | High-side drain pin voltage | VDRAIN, low-side gate drive, and high-side gate drive switching with bootstrap | 0 | 90 | V | |
VBST-SH | Bootstrap pin voltage with respect to SH | BST (VBST - VSH), high-side gate drive switching and no BST_UV detection, VBST-SH min > VBST_UV max (rising), |
6.1 | 20 | V | |
Bootstrap pin voltage with respect to SH (DRV8162Lonly) | BST (VBST - VSH), DRV8162L device variant only, high-side gate drive switching and no BST_UV detection, VBST-SH min > VBST_UV max (rising) |
4.6 | V | |||
VBST | Bootstrap pin voltage | BST | 0 | 105 | V | |
VSH | High-side source pin voltage | SH | -2 | 95 | V | |
VI | Digital / Pin detection input voltage | INH, INL, IDRIVE1, IDRIVE2, GAIN, VDSLVL | 0 | 5.5 | V | |
VOD | Open drain pullup voltage | nFAULT |
5.5 | V | ||
IOD | Open drain output current | nFAULT |
–5 | mA | ||
VCSAREF | Current sense amplifier reference voltage | CSAREF | 3.0 | 5.5 | V | |
TA | Operating ambient temperature | –40 | 125 | °C | ||
TJ | Operating junction temperature | –40 | 150 | °C |