The newest family of programmable gain instrumentation amplifiers (PGA) provides immense versatility with the PGA855, a differential output device, and the PGA849, a single ended output device. This family was developed using new current-feedback input stage architecture independent to the ADC compatible output stage, resulting in superb DC and AC performance, all in one integrated IC design. These devices can interface with a wide variety of sensors, such as bridge sensors or pressure sensors, and can be used in low gain applications or attenuating gain applications. The family of devices boast additional features such as input voltage protection up to ±40 beyond the power supply, optional filtering and separate power supply rails to support output clamping.

The PGA855 and PGA849 excel in applications that require a combination of high DC accuracy with low noise and low distortion AC performance over frequency measurements.

Figure 1 PGA855 and PGA849 Block Diagrams

Design Considerations

• Over-voltage protection of downstream device
• Input over-voltage protection of up to ±40V
• Attenuating gain down to 0.125V/V and up to 16V/V
• Optional additional output-noise filtering
• Directly drive high-resolution ADC, up to 1MSPS

The input stage implements TI’s super-beta technology which inherently has higher input impedance, making the PGA855 and PGA849 great choices for interfacing with high source impedances. The super-beta transistors also offer an impressively low input bias current (200pA), which provides a very low input current noise density of 0.3pA/√Hz; the devices also benefit from an ultra-low 1/f noise corner of less than 5Hz. This family provides the lowest overall signal error in the industry and delivers best DC precision for low gain applications.

The PGA855 and PGA849 reduce the total source-errors by more than half of the leading current solutions. The family of devices maintain good linearity and long-term stability across temperature and excellent gain stability with a gain error drift of 2ppm/°C across all gains. The device family also facilitates the timely and costly process of calibration by providing a low offset voltage (±350μV) and low offset drift (±1μV/°C) in combination with the low gain error drift and low noise. With great DC performance, these devices are a natural choice for sensor interfacing. Refer to Precision signal chain for digital multimeters reference design for an example of the benefits of the PGA855.

Figure 2 Current Noise Spectral Density Versus Frequency

Figure 3 Voltage Noise Spectral Density (RTI) Versus Frequency

The output stage of the PGA855 encompasses an integrated, independent fully-differential output amplifier (FDA), providing a flat frequency response up to 10MHz, across all gains, and a high minimum CMRR of 82dB.

Figure 4 Gain Versus Frequency

The output stage architecture is optimized to drive inputs of high-resolution ADCs without the need of supplementary driving circuitry, supporting unbuffered precision SAR ADCs up to 1MSPS sampling rate. The PGA855 can successfully be used as the front-end circuit of the ADS8900B, an unbuffered 20-bit SAR ADC. For a comprehensive circuit example and performance evaluation refer to the PGA855 data sheet. The PGA855 is also capable of driving the ADS127L21, a 24-bit delta sigma ADC and is able to achieve an SNR of 109dB; a detailed circuit example and performance evaluation can be found in the ADS127L21 data sheet; while Figure 5 demonstrates the evaluated circuit.

Figure 5 PGA855 Driving ADS8900B, 20-bit SAR ADC Circuit

System performance is imperative when using high resolution precision ADCs. This PGA family of devices provide external access pins to the differential output amplifier loop for optional noise filtering by implementing feedback capacitors to further improve SNR performance. Figure 6 demonstrates the additional noise filtering when driving an ADS127L21, application note Achieve High SNR with the PGA855, Fully Differential Programmable-Gain Amplifier showcases this application and further explains the implementation. Figure 7 demonstrates an example circuit implementing the optional capacitors.

Figure 6 PGA855 Driving ADS127L21,24 Bit Delta Sigma ADC, With Optional Feedback Capacitors

Figure 7 illustrates a block diagram of the PGA849 directly driving the ADS8860, a 16-bit SAR ADC. For a detailed circuit design and information see PGA849 data sheet.

Figure 7 PGA849 Driving ADS8860, 16-bit SAR ADC Circuit Example

The output stage of this family of devices has separately decoupled power supplies (LVSS/LVDD) from the input stage. The output stage power rails, LVSS/LVDD, can be connected to the power rail of the downstream device, most commonly an ADC, to protect the device against overdrive damage by limiting the PGA855 output voltage to within LVSS/LVDD. To help demonstrate this functionality, TI created the PGA85X Input and Output Range Design calculator, available online.

The PGA85X Input and Output Range Design calculator is an interactive tool that graphically displays the range of the device based on user inputs, download here.

Figure 8 PGA855 Input and Output Range Design Calculator