SLVU743A September   2012  – June 2021 TPS62175 , TPS62177

 

  1. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification
    3. 1.3 Modifications
      1. 1.3.1 Fixed Output Voltage Operation
      2. 1.3.2 Input and Output Capacitors
      3. 1.3.3 Loop Response Measurement
  2. 2Setup
    1. 2.1 Input/Output Connector Descriptions
    2. 2.2 Setup
  3. 3TPS62175EVM-098 Test Results
  4. 4Board Layout
  5. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  6. 6Revision History

2.1 Input/Output Connector Descriptions

J1 – VINPositive input connection from the input supply for the EVM.
J2 – S+/S-Input voltage sense connections. Measure the input voltage at this point.
J3 – GNDReturn connection from the input supply for the EVM.
J4 – VOUTOutput voltage connection.
J5 – S+/S-Output voltage sense connections. Measure the output voltage at this point.
J6 – GNDOutput return connection.
J7 – PG/GNDThe PG output appears on pin 1 of this header with a convenient ground on pin 2.
JP1 – ENEN pin input jumper. Place the supplied jumper across ON and EN to turn on the IC. Place the jumper across OFF and EN to turn off the IC.
JP2 – SLEEPSLEEP pin input jumper. Place the supplied jumper across ON and SLEEP to activate SLEEP mode. Place the jumper across OFF and SLEEP to activate normal mode.
JP3 – PG Pullup VoltagePG pin pullup voltage jumper. Place the supplied jumper on JP3 to connect the PG pin pullup resistor to Vout. Alternatively, the jumper can be removed and a different voltage can be supplied on pin 1 to pull up the PG pin to a different level. This externally applied voltage must remain below 7 V.