SLVUB62B June 2017 – November 2020
Figure 9-1 shows the block diagram of the main components of the TPS65988EVM. The main schematic blocks port A/B control MUX and SS MUX, USB HUB, power paths, power supplies, USB Type-C receptacles, processor, BoosterPack headers, and hardware.
Figure 9-2 illustrates the processor block showing the USB Type-C PD controller and contains connections for GPIOs, D+ and D-, CC1 and CC2, HRESET, I2C lines, SPI for flash memory, and ADC1 and ADC2.
Figure 9-3 shows the power path block, which contains the power portion of the TPS65988 and the required passives. The external power path consists of back-to-back PMOS with RCP circuit. The internal power path is used for sourcing power and the external power path is used for sinking power. The TPS65988 power path can provide power to VBUS or consume power from VBUS.
Figure 9-4 shows the power supply block, which has all of the onboard supplies generated and the comparator circuit for barrel-jack detection. There are two variable supplies that generate 5, 9, 15, and 20 V. There are three DC/DC converters that generate 1.2, 3.3, and 5 V. The minimum voltage for SYS_PWR is 5 V; however, this also decreases VBUS maximum power capabilities. When using a lower voltage, the comparator circuit may have to be adjusted to trip at a lower voltage for proper barrel jack detection.
Figure 9-5 shows the DisplayPort Mux used to switch the DisplayPort signals to either USB Type-C Port.
Figure 9-6 shows the SS MUX block for port A which connects the DP and USB signals from the DP and USB receptacle. Operating from the system 3.3-V rail, the SS MUX is used for configurations C, D, and E from DisplayPort. Achieve configurations through GPIO or I2C. As the host, the SS MUX is capable of USB 3.1 data rates up to 5 Gbps and DP 1.4 up to 8.1 Gbps with 2 or 4 DP lanes.
Figure 9-7 shows the SS MUX block for port B which connects the DP and USB signals from the DP and USB receptacle. Operating from the system 3.3-V rail, the SS MUX is used for configurations C, D, and E from DisplayPort. Achieve configurations through GPIO or I2C. As the host, the SS MUX is capable of USB 3.1 data rates up to 5 Gbps and DP 1.4 up to 8.1 Gbps with 2 or 4 DP lanes.
Figure 9-8 shows the USB HUB, which contains the connections from the USB source receptacle.
Figure 9-9 shows the USB Type-C block, which includes the USB Type-C port A and ESD protection.
Figure 9-10 shows the USB Type-C block, which includes the USB Type-C port B and ESD protection.
Figure 9-11 shows the FTDI block, which contain the connections from the FTDI board.
Figure 9-12 and Figure 9-13 show the current sense block, which contain the sense connections to VBUS and VIN_3V3 for port A and port B.
Figure 9-14 shows the BoosterPack headers block, which contain the connections to the BoosterPack headers.