SLVUBM1 EVM User's guide

SLVUBM1C January 2019 – January 2021 TPS65994AD

1
2
3
4
5
1. 6
  1. 7
  2. 8
  3. 9
    1. 10
  4. 11
  5. 12
  6. 13
  7. 14
  8. 15
  9. 16
  10. 17
  11. 18
  12. 19
2. 20
  1. 21
  2. 22
23
1. 24
2. 25
26
1. 27
2. 28
29
1. 30
  1. 31
  2. 32
  3. 33
    1. 34
35
1. 36
2. 37
38
39
40
41
42
43
44

4.1.3.1 S1 and S2: ADCIN1 and ADCIN2

The TPS65994 EVM has a switch (S1) that can be used to configure the ADCIN1 and ADCIN2 pin strapping settings of the TPS65994. ADCIN1 is controlled through S1 and ADCIN2 is controlled through S2. Refer to TPS65994 datasheet to see different ADCINx configurations. Table 4-1 highlights the switch settings to enable the different ADCINx configurations. With all switches on S1 and S2 disabled, switches S4A and S4B can be used to directly short the ADCINx pin to LDO_1V5. The schematic for the ADCIN1 and ADCIN2 configuration switches can be seen in Figure 4-2.

Table 4-1 S1 and S2: ADCIN1 and ADCIN2 Switch Settings

ADCINx Switch Settings
1	2	3	4	Setting
0	0	0	0	0
0	0	1	1	1
0	1	0	1	2
0	1	1	1	3
0	0	1	0	4
0	1	0	0	5
1	0	0	0	6
1	1	0	0	7

Figure 4-2 ADCIN1 and ADCIN2 Configuration Schematic