SLVUC17 August   2021 TPS7H2211-SP

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Default Board Configuration
    2. 1.2 Alternate Board Configurations
  3. 2EVM Connectors and Test Points
  4. 3Test Results
    1. 3.1 Default Configuration Results
    2. 3.2 Parallel Configuration Results
  5. 4Board Layout
  6. 5Schematic
    1. 5.1 Default Configuration Schematic
    2. 5.2 Parallel Configuration Schematic
  7. 6Bill of Materials (BOM)
    1. 6.1 Default Configuration BOM
    2. 6.2 Parallel Configuration BOM

Parallel Configuration Results

The results shown in Figure 3-5 through Figure 3-8 were observed using the TPS7H2211EVM-CVAL in the parallel configuration shown in this document with VIN = 13 V.

GUID-A8F1C04A-E17E-451D-95FF-64F69D01EF09-low.png Figure 3-5 Parallel Configuration: Startup
GUID-41418E83-1FAC-431A-8B1B-16F5863CCB45-low.png Figure 3-6 Parallel Configuration: Shutdown
GUID-50F26730-8341-4EFF-BC7C-123D1DC13FCB-low.png Figure 3-7 Parallel Configuration: Assertion of OVP due to Input Voltage
GUID-BD1386BB-C599-4A71-910F-0C39CD7107F4-low.png Figure 3-8 Parallel Configuration: Deassertion of OVP due to Input Voltage