SLVUC32B June 2021 – February 2022 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1 , TPS6594-Q1
These settings detail the default configurations for what is monitored by PGOOD pin. All these settings can be changed though I2C after startup.
Register Name | Field Name | TPS65941212-Q1 | TPS65941111-Q1 | ||
---|---|---|---|---|---|
Value | Description | Value | Description | ||
PGOOD_SEL_1 | PGOOD_SEL_BUCK1 | 0x0 | Masked | 0x0 | Masked |
PGOOD_SEL_BUCK2 | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_BUCK3 | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_BUCK4 | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_2 | PGOOD_SEL_BUCK5 | 0x0 | Masked | 0x0 | Masked |
PGOOD_SEL_3 | PGOOD_SEL_LDO1 | 0x0 | Masked | 0x0 | Masked |
PGOOD_SEL_LDO2 | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_LDO3 | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_LDO4 | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_4 | PGOOD_SEL_VCCA | 0x0 | Masked | 0x0 | Masked |
PGOOD_SEL_TDIE_WARN | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_NRSTOUT | 0x0 | Masked | 0x0 | Masked | |
PGOOD_SEL_NRSTOUT_ SOC | 0x0 | Masked | 0x0 | Masked | |
PGOOD_POL | 0x0 | PGOOD signal is high when monitored inputs are valid | 0x0 | PGOOD signal is high when monitored inputs are valid | |
PGOOD_WINDOW | 0x0 | Only undervoltage is monitored | 0x0 | Only undervoltage is monitored |