SLVUC99A January   2022  – January 2022 DRA829V , TDA4VM , TPS6594-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Device Versions
  4. 3Processor Connections
    1. 3.1 Power Mapping
    2. 3.2 Control Mapping
  5. 4Supporting Functional Safety Systems
    1. 4.1 Achieving ASIL-B System Requirements
    2. 4.2 Achieving up to ASIL-D System Requirements
  6. 5Static NVM Settings
    1. 5.1  Application-Based Configuration Settings
    2. 5.2  Device Identification Settings
    3. 5.3  BUCK Settings
    4. 5.4  LDO Settings
    5. 5.5  VCCA Settings
    6. 5.6  GPIO Settings
    7. 5.7  Finite State Machine (FSM) Settings
    8. 5.8  Interrupt Settings
    9. 5.9  POWERGOOD Settings
    10. 5.10 Miscellaneous Settings
    11. 5.11 Interface Settings
    12. 5.12 Multi-Device Settings
    13. 5.13 Watchdog Settings
  7. 6Pre-Configurable Finite State Machine (PFSM) Settings
    1. 6.1 Configured States
    2. 6.2 PFSM Triggers
    3. 6.3 Power Sequences
      1. 6.3.1 TO_SAFE_SEVERE and TO_SAFE
      2. 6.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 6.3.3 ACTIVE_TO_WARM
      4. 6.3.4 ESM_SOC_ERROR
      5. 6.3.5 PWR_SOC_ERROR
      6. 6.3.6 MCU_TO_WARM
      7. 6.3.7 TO_MCU
      8. 6.3.8 TO_ACTIVE
      9. 6.3.9 TO_RETENTION
  8. 7Application Examples
    1. 7.1 Moving Between States; ACTIVE, MCU ONLY, and RETENTION
      1. 7.1.1 ACTIVE
      2. 7.1.2 MCU ONLY
      3. 7.1.3 RETENTION
    2. 7.2 Entering and Exiting Standby
    3. 7.3 Entering and Existing LP_STANDBY
    4. 7.4 Runtime Customization
  9. 8References
  10. 9Revision History

5.12 Multi-Device Settings

These settings detail whether the device is a operating as a primary or secondary in the system. These settings cannot be changed after device startup.

Table 5-12 Multi-Device NVM Settings
Register NameField NameTPS65941213-Q1TPS65941111-Q1
ValueDescriptionValueDescription
SPMI_CONFIG_1SPMI_CRC_EN0x1SPMI CRC check enabled0x1SPMI CRC check enabled
BIT 10x1Primary mode0x0Secondary mode
SPMI_CLK_SEL0x25MHz0x25MHz
SPMI_CONFIG_2SPMI_IF_SEL0x0Debug feature and uses primary logic to implement logical secondary.0x0Debug feature and uses primary logic to implement logical secondary.
SPMI_RETRY_LIMIT0x3Three retries in case of error detected0x3Three retries in case of error detected
SPMI_WD_AUTO_BOOT0x1SPMI auto boot enabled0x1SPMI auto boot enabled
SPMI_EN0x1SPMI enabled0x1SPMI enabled
SPMI_WD_EN0x1SPMI WD enabled0x1SPMI WD enabled
SPMI_CONFIG_3SPMI_WD_BOOT_ INTERVAL0x80x80x80x8
SPMI_WD_RUNTIME_ INTERVAL0x80x80x80x8
SPMI_CONFIG_4SPMI_WD_RESPONSE_ TIMEOUT0x80x80x80x8
SPMI_PFSM_RESPONSE_ TIMEOUT0x80x80x80x8
SPMI_CONFIG_5SPMI_WD_RUNTIME_BIST_ TIMEOUT0x80x80x80x8
SPMI_WD_BOOT_BIST_ TIMEOUT0x80x80x80x8
SPMI_CONFIG_6BOOT_DELAY0x00x00x00x0
SPMI_IDSPMI_SID0x50x50x30x3
SPMI_MID0x00x00x00x0