SLVUC99A January 2022 – January 2022 DRA829V , TDA4VM , TPS6594-Q1
As shown in Section 6.3.9, the MCU is powered off and therefore the transition out of the RETENTION to the MCU ONLY or the ACTIVE states must be configured before entering RETENTION. Similar to the MCU ONLY state the I2C_7 triggers must be set for both PMICs. Additionally, the TPS65941111 GPIO4 ( H_DDR_RET_1V1), must be set before entering RETENTION. In this example GPIO4 on the TPS65941213 is used to wake the device from RETENTION to ACTIVE.
Write 0x48:0x85:0x80:0x7F // I2C_7 is high
Write 0x4C:0x85:0x80:0x7F
Write 0x48:0x34:0xC0;0x3F // Set GPIO4 to WKUP1 (goes to ACTIVE state)
Write 0x48:0x64:0x08:0xF7 // clear interrupt of gpio4, write to clear
Write 0x48:0x4F:0x00:0xF7 // unmask interrupt for GPIO4 falling edge
Write 0x4C:0x3D:0x08:0xF7 // set PMICB:GPIO4, H_DDR_RET_1V1
Write 0x48:0x86:0x00:0xFC // trigger the TO_RETENTION power sequence
After the GPIO4 has gone low and the PMICs have returned to the ACTIVE state
Write 0x48:0x86:0x03:0xFC // Set NSLEEPx bits for ACTIVE state
Write 0x48:0x64:0x08:0xF7 // clear interrupt of gpio4
Write 0x4C:0x3D:0x00:0xF7 // clear PMICB:GPIO4, DDR_RET
In this example the TPS65941213 RTC Timer is used to wake the device from RETENTION to ACTIVE.
Write 0x48:0x85:0x80:0x7F // I2C_7 is high
Write 0x4C:0x85:0x80:0x7F
Write 0x48:0xC3:0x01;0xFE // Enable Crystal
Write 0x48:0xC5:0x05:0xF8 // minute timer, enable TIMER interrupts
Write 0x48:0xC2:0x01:0xFE // start timer, if the timer values are non-zero clear before starting
Write 0x4C:0x3D:0x08:0xF7 // set PMICB:GPIO4, H_DDR_RET_1V1
Write 0x48:0x86:0x00:0xFC // trigger the TO_RETENTION power sequence
After the RTC Timer interrupt has occurred and the PMICs have returned to the ACTIVE state
Write 0x48:0x86:0x03:0xFC // Set NSLEEPx bits for ACTIVE state
Write 0x48:0xC5:0x00:0xFB // disable timer interrupt, clear bit 2
Write 0x48:0xC4:0x00:0xDF // clear timer interrupt, clear bit 5
Write 0x4C:0x3D:0x00:0xF7 // clear PMICB:GPIO4, DDR_RET