SLVUC99A January 2022 – January 2022 DRA829V , TDA4VM , TPS6594-Q1
There are different orderable part numbers (OPNs) of the TPS6594-Q1 device available with unique NVM settings to support different end product use cases and processor types. The unique NVM settings for each PMIC device are optimized per PDN design to support different processors, processing loads, SDRAM types, system functional safety levels, and end product features (such as low power modes, processor voltages, and memory subsystems). The NVM settings can be identified by both NVM_ID and NVM_REV registers. Each PMIC device is distinguished by the part number, NVM_ID, and NVM_REV values listed in Table 2-1.
PDN USE CASE | PDN | Orderable Part Number | TI_NVM_ID (TI_NVM_REV) | Orderable Part Number | TI_NVM_ID (TI_NVM_REV) | Error Signal Monitoring |
---|---|---|---|---|---|---|
| 0C(3) | TPS65941213 RWERQ1 | 0x13 (0x04) | TPS65941111 RWERQ1 | 0x11 (0x03) | Dedicated MCU and SOC |
0B | TPS65941212 RWERQ1 | 0x12 (0x03) | TPS65941111 RWERQ1 | 0x11 (0x03) | Combined MCU and SOC |