3 Typical NVM Flow

This section describes the typical NVM definition flow which consists of the following steps: System requirements, Hardware setup, NVM programming and Test/Validation.

1. System Requirements

   Identify the system requirements and build a power distribution network (PDN). Voltage/Current, power-up/power-down sequence, low power modes, and load transient are typical requirements from processors, SoCs and peripherals.

2. Hardware Setup

   The TPS65219 can be programmed using the PMIC socketed EVM, a customer prototype board (in-circuit programming), or production line.

   • Socketed EVM: The PMIC socketed EVM comes with an onboard MSP340 that can communicate with the PMIC through I2C to re-program the NVM memory. This hardware also integrates a discrete 3.3V LDO that can supply the I2C pull-up resistors while the PMIC rails are OFF in Initialize state.
     Figure 3-1 Socketed EVM
   • Prototype board: The user-programmable TPS6521905 NVM comes with all the power resources inactive by default and the EN/PB/VSENSE pin configured as push-button with without FSD (PU_ON_FSD = 0x0). If this pin is pulled up to VSYS, PMIC stays OFF (Initialize state) when a valid supply is connected to VSYS. This configuration allows the reprogramming of the NVM before the power-up sequence is executed. Figure 3-2 shows what customers need to include in the prototype board to re-program the PMIC NVM. The components required include three test points on GND, SCL, SDA, and a 1x3 single row header connector that selects the pull-up supply between the external 3.3V and the PMIC rail that supplies the I2C pins in the normal application. The USB2ANY (available at ti.com) can be used to communicate with the PMIC and re-program the NVM settings.
     Figure 3-2 Prototype Example
     Note: See section "Specifications" and "Detailed Design Procedure" in the data sheet for information about recommended external components like inductors, output capacitance, and so on.
   • Production line: PMIC NVM can also be re-programmed in a production line following the Figure 2-1 before soldering the device into the final PCB.

3. NVM Programming

   Follow the programming instructions in Section 4 to change the register settings and save the new values into the NVM memory. The TPS65219-GUI can be used with the socketed EVM (or a prototype board plus an external USB2ANY). Alternatively, customers can use their preferred I2C debugger tool to write to each of the NVM registers without using the TPS65219-GUI. Once the NVM is re-programmed, it is recommended to perform a power cycle to confirm the new register settings were saved into the NVM memory.

   Figure 3-3 TPS65219-GUI

4. NVM Testing

   NVM settings must be tested to confirm expected PMIC behavior. The list below shows the minimum recommended tests. These tests can be performed in the socketed EVM or prototype board. If the socketed EVM was used to re-program the PMIC, the devices can be soldered down into the customer prototype board to test and validate system level functionality. Alternatively, the PMIC on the soldered down TPS65219EVM can be replaced to test a custom NVM configuration.

   • Measure all output voltages
   • Collect scope waveform for power-up sequence (include GPIOs if enabled and nRSTOUT)
   • Collect scope waveform for power-down sequence (include GPIOs if enabled and nRSTOUT)
   • Test EN/PB/VSENSE pin function and polarity to trigger ON and OFF request.
   • Test each multi-function pin (VSEL, MODE/STBY, MODE/RESET) configuration and polarity. Pull this pin high or low and verify if PMIC behavior changes according to the configured pin function.
   Note: The socketed EVM can be used for re-programming and basic tests (For example: measuring output voltages, colleting power-up sequence waveforms, and so on) but must not be used to test specific performance parameters like load transient and efficiency because the socket pogo pins and layout placement introduce higher parasitic that do not represent the design of a real application.