SLVUCP8 September 2024 TPS26750
The J2 and J5 headers are setup for ease of use with 5V and 10V level logic analyzers. The most pertinent signals and power rails for testing the TPS26750 are pulled out to these headers. If utilizing the Liquid Detection feature, note that pins SBU1 and SBU2 on Header J5 are not the SBU signals directly at the DUT Type-C connecter (J4), but are instead the SBU signals from the Liquid Detection circuit to the SBUx pins of the TPD4S480, as shown in Figure 5-2.
Pin | Name |
---|---|
1 | GPIO5 (lower right-most pin if able to read J2 on silk screen) |
2 | GPIO6 |
3 | GPIO4 |
4 | GPIO7 |
5 | GPIO3 |
6 | GPIO11 |
7 | GND |
8 | GND |
9 | EPR_EN (GPIO2) |
10 | I2Cc_IRQ |
11 | GPIO1 |
12 | I2Ct_SDA |
13 | GPIO0 |
14 | I2Ct_SCL |
15 | PP_EN (Buffered POWER_PATH_EN output) |
16 | I2Ct_IRQ |
Pin | Description |
---|---|
1 | I2Cc_SDA (upper left-most pin if able to read J5 on silk screen) |
2 | I2Cc_SCL |
3 | ADCIN2 |
4 | ADCIN1 |
5 | SBU2 |
6 | SBU1 |
7 | GND |
8 | GND |
9 | CC2 |
10 | CC1 |
11 | LDO_3V3 |
12 | VIN_3V3 |
13 | PP5V |
14 | HV_SYS_D10 (HV_SYS divided by 11) |
15 | VBUS_D10 (VBUS divided by 11) (labeled as VBUS_LV_D10 on silk screen) |
16 | PPHV__D10 (PPHV divided by 11) |
17 | VBUS_LV_D10 (VBUS_LV divide by 11) (labeled as VBUS_D10 on silk screen) |
18 | No Connect |
19 | GND |
20 | GND |