SLVUCR7 September   2024 TPS26750

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     National Conventions
    3.     Glossary
    4.     Related Documents
    5.     Support Resources
    6.     Trademarks
  3. 1Introduction
    1. 1.1 Introduction
      1. 1.1.1 Purpose and Scope
    2. 1.2 PD Controller Host Interface Description
      1. 1.2.1 Overview
      2. 1.2.2 Register and field notation
    3. 1.3 Unique Address Interface
      1. 1.3.1 Unique Address Interface Protocol
  4. 2PD Controller Policy Modes
    1. 2.1 Overview
    2. 2.2 Source Policy Mode
    3. 2.3 Sink Policy Mode
  5. 3Register Overview
  6. 4TPS26750 Registers
  7. 54CC Task Detailed Descriptions
    1. 5.1 Overview
    2. 5.2 CPU Control Tasks
      1. 5.2.1 'Gaid' - Return to normal operation
      2. 5.2.2 'GAID' - Cold reset request
    3. 5.3 PD Message Tasks
      1. 5.3.1  'SWSk' - PD PR_Swap to Sink
      2. 5.3.2  'SWSr' - PD PR_Swap to Source
      3. 5.3.3  'SWDF' - PD DR_Swap to DFP
      4. 5.3.4  'SWUF' - PD DR_Swap to UFP
      5. 5.3.5  'GSkC' - PD Get Sink Capabilities
      6. 5.3.6  'GSrC' - PD Get Source Capabilities
      7. 5.3.7  'ESkC' - PD EPR Get Sink Capabilities
      8. 5.3.8  'ESrC' - PD EPR Get Source Capabilities
      9. 5.3.9  'GPPI' - PD Get Port Partner Information
      10. 5.3.10 'SSrC' - PD Send Source Capabilities
      11. 5.3.11 'MBRd' - Message Buffer Read
    4. 5.4 Patch Bundle Update Tasks
      1. 5.4.1 'PBMs' - Start Patch Burst Mode Download Sequence
      2. 5.4.2 'PBMc' - Patch Burst Mode Download Complete
      3. 5.4.3 'PBMe' - End Patch Burst Mode Download Sequence
      4. 5.4.4 'GO2P' - Go to Patch Mode
      5. 5.4.5 'FLrd' - Flash Memory Read
      6. 5.4.6 'FLad' - Flash Memory Write Start Address
      7. 5.4.7 'FLwd' - Flash Memory Write
      8. 5.4.8 'FLvy' - Flash Memory Verify
    5. 5.5 System Tasks
      1. 5.5.1 'DBfg' - Clear Dead Battery Flag
      2. 5.5.2 'I2Cr' - I2C read transaction
      3. 5.5.3 'I2Cw' - I2C write transaction
      4. 5.5.4 'GPsh' - set GPIO high
      5. 5.5.5 'GPsl' - set GPIO low
  8. 6User Reference
    1. 6.1 PD Controller Application Customization
    2. 6.2 Loading a Patch Bundle
    3. 6.3 AUTO_NEGOTIATE_SINK Register
      1. 6.3.1 AUTO_NEGOTIATE_SINK usage example #1
      2. 6.3.2 AUTO_NEGOTIATE_SINK usage example #2
      3. 6.3.3 AUTO_NEGOTIATE_SINK usage example #3
      4. 6.3.4 AUTO_NEGOTIATE_SINK usage example #4
    4. 6.4 IO_CONFIG Register
      1. 6.4.1 GPIO Events
  9. 7Revision History

5.3.8 'ESrC' - PD EPR Get Source Capabilities

Table 5-11 'ESrC' - PD EPR Get Source Capabilities
DescriptionThe 'ESrC' Task instructs PD Controller to issue a EPR_Get_Source_Cap message to the Port Partner device at the first opportunity while maintaining policy engine compliance.
INPUT DATAXNone
OUTPUT DATAXByte 1: Standard Task Return Code. See also Table 5-1.
Task CompletionThe 'ESrC' Task completes either when the EPR Source Capabilities message is received or the Task otherwise fails. The 'ESrC' Task shall be considered rejected if:
  • The Port Partner is a Sink and indicated (through previous Source or Sink Capabilities) it was not Dual-Role Power.
  • The Port Partner responds to the EPR_Get_Source_Cap message with a Reject or Not_Supported message.
The 'ESrC' Task shall be considered timed-out if:
  • The Port Partner fails to respond within the time required by the PD spec.
The 'ESrC' Task shall be considered successful if:
  • The EPR_Get_Source_Cap message is sent, GoodCRC'ed and a EPR_Source_Capabilities message is received and processed.
Side EffectsWhen the 'GSrC' Task completes successfully the RX_SOURCE_CAPS register (0x30) will have been updated.
Additional InformationThe 'ESrC' Task can only be sent if the PD is capable of operating as a Sink or DRP and supports EPR mode.