4 Art using the ADC3669

Our example uses the 16-bit, dual-channel ADC3669 ADC for a wideband front end match design of 1.5GHz of analog sampling bandwidth. The example also uses the TCM2-33WX+ balun from Mini-Circuits, which has 3GHz of bandwidth and low insertion loss compared to higher-cost baluns that are easier to match with. This balun also has very good phase imbalance, <5degrees, when compared to other lower-cost baluns across the same frequency range.

Using the generalized circuit in Figure 3, the components needed are not purely resistive to define the match. In this case, we will use a resistor (R), internal parasitic capacitance (C) and inductor (L) (R2, R3 and R6) approach; see Figure 4.

PCB parasitics will still be an issue, necessitating that you test a few different iterations on your board.

Get both sets of S-parameters (if available) for the balun and ADC and use your favorite simulation software. Use the matching network format given in Figure 3 and one of these two approaches for R2, R3 and R4:

• The attenuation pad approach (approximately 8.6Ω, 140Ω and 8.6Ω for R2, R3 and R4, respectively) will give you a 3dB pad. To learn more about this approach, see the Electronic Products article, “Unraveling the Full-Scale Mysteries of Your RF Converter’s Analog Inputs.”
• The R, C and L approach for R2, R3 and R4, respectively, helps resonate away the ADC’s C using L as the last component. This approach will flatten out the bandwidth, allowing the balun to perform at its rated bandwidth. This approach does take a bit of iteration, however.

The goal here is to not use a lossy attenuation pad. Therefore, to give more context to the R, C and L approach, see Figure 5, Figure 6 and Figure 7 as varying the L, C and R, respectively, in the network (see Figure 4) and its role in defining the ultimate bandwidth and network match.

Figure 5 shows how changing the value of L around influences the bandwidth while keeping all other component values the same. Notice that as L increases in value the bandwidth is slowly reduced. This means that the L value is having an adverse reactive effect on the C of the ADC.

Figure 6 shows how moving the value of C around influences the bandwidth while keeping all other component values the same. Notice that as the value of C reduces, the bandwidth is slowly improving – at the cost of bandwidth flatness. This means that the C value is having a reactive effect on the balun’s return loss over frequency. These capacitors help preserve the balun’s bandwidth vs. frequency.

Figure 7 shows how moving the value of R around influences the bandwidth while keeping all other component values the same. Notice that as R increases in value, the bandwidth is slowly improving – at the cost of flatness or peaking in the bandwidth response. The effect of R’s value is almost the same as the effect of L, therefore preserving the impedance requirements that both the balun and ADC should have in conjunction with each other.

Simulating the R, C and L approach would give you a good starting point, using the “tune” feature in simulation software, and enables you to see the roles that each component plays in the network match. Settling on some good starting values can help define which direction to go when iterating and perfecting the match as needed for your application.

During the matching design effort, completing an AC performance sweep across the application bandwidth of the converter will give you insight as to how the performance is coming along dynamically, and ensure that nothing has gone wrong with the ADC.

Figure 8 illustrates the AC performance (SNR and spurious-free dynamic range [SFDR]) measured across the bandwidth of the ADC3669, using the method we’ve described to match the input network to 1.5GHz.