LMK3H0102 Reference-Less 2-Differential or 5-Single-Ended Output PCIe Gen 1-6 Compliant Programmable BAW Clock Generator

1 Features

Integrated BAW resonator, no need for external reference
Flexible frequency generation:
- Two channel dividers: up to three unique output frequencies from 2.5MHz to 400MHz
- LVCMOS outputs supported up to 200MHz: 1.8V, 2.5V, or 3.3V
- Combination of AC-LVDS, DC-LVDS, LP-HCSL, and LVCMOS on OUT0 and OUT1 pins
- Additional LVCMOS output for generation of up to 5 LVCMOS clocks
Total output frequency stability: ±25ppm
2 functional modes: I²C or preprogrammed OTP
- Fully configurable I²C address
Ambient temperature: –40°C to 85°C
PCIe Gen 1 to Gen 6 compliant: Common Clock with or without SSC, SRNS, and SRIS
Very low PCIe jitter with SSC:
- PCIe Gen 3 Common Clock jitter: 135.3fs maximum (PCIe limit is 1ps)
- PCIe Gen 4 Common Clock jitter: 135.3fs maximum (PCIe limit is 500fs)
- PCIe Gen 5 Common Clock jitter: 57.5fs maximum (PCIe limit is 150fs)
- PCIe Gen 6 Common Clock jitter: 34.5fs maximum (PCIe limit is 100fs)
Programmable SSC modulation depth
- Preprogrammed: –0.1%, –0.25%, –0.3%, and –0.5% down spread
- Register programmable: –0.1% to –3% down spread or ±0.05% to ±1.5% center spread
1.8V to 3.3V supply voltage
Internal LDOs with –93.1dBc PSNR at 500kHz switching noise for LP-HCSL outputs
Start-up time: <1.5ms
Output-to-output skew: <50ps
Fail-safe digital input pins