SNAU259 August   2021 LMK1D1208

 

  1.   Trademarks
  2. 1 Features
  3. 2 General Description
  4. 3 Signal Path and Control Circuitry
  5. 4 Getting Started
  6. 5 Power Supply Connection
  7. 6 Input Clock Selection
    1. 6.1 Differential Input
    2. 6.2 Configuring Single-Ended Input
  8. 7 Output Clock
  9. 8 EVM Board Schematic
  10. 9 REACH Compliance
  11. 10Bill of Materials

7 Output Clock

The LMK1D1208 generates up to eight LVDS outputs, and two outputs are available by default on the EVM (OUT1 and OUT4) through the following SMAs: J7 and J10 for OUT1; J8 and J11 for OUT4. The LVDS outputs are AC-coupled to their respective SMAs. Each output pair has an option of 100-Ω termination on the board (R19 and R20 – populated).