SNAU259 August   2021 LMK1D1208

 

  1.   Trademarks
  2. Features
  3. General Description
  4. Signal Path and Control Circuitry
  5. Getting Started
  6. Power Supply Connection
  7. Input Clock Selection
    1. 6.1 Differential Input
    2. 6.2 Configuring Single-Ended Input
  8. Output Clock
  9. EVM Board Schematic
  10. REACH Compliance
  11. 10Bill of Materials

Input Clock Selection

The LMK1D1208 can receive either a differential or single-ended clock as clock input. The default board configuration is for a differential signal at both device inputs. The inputs can be applied through the SMAs, J1, J3 or J4, J6. These inputs are AC-coupled to the device. The common-mode voltage is provided by the device on-chip bias generator (VAC_REF) pins.

LMK1D1208: Either of the two input clocks can be selected using the jumper J5. When J5 is connecting IN_SEL to GND, IN0 is selected. When J5 is connecting IN_SEL to VDD, IN1 is selected.