SNIA044 November 2021 TMP61 , TMP61-Q1 , TMP63 , TMP63-Q1 , TMP64 , TMP64-Q1
Sometimes it may not be possible to route on the top layer because the IC is soldered to the pad. Instead, as Figure 3-9 shows, a dedicated thermal trace can be routed on the ground plane layer. Isolation protects the thermal trace from being connected to the plane, except at the vias used for thermal measurement. The thermal trace begins at a specific location on the ground plane layer underneath the power IC.
RT1 is the first TMP6 thermistor and RT3 is the second thermistor. R7 and R9 are the bias resistors for the two thermistors. The trace is 10 mil wide, which means there are 7 squares between RT1 and RT3 and 17.5 squares from the internal via to RT1. The ratio of the thermal resistances is calculated as 17.5 / 7 or 2.5. This ratio is an estimate and should be verified using a thermal camera. Once the ratio is verified, the temperature between RT1 and RT3 can be multiplied by the ratio and added to the temperature at RT1 to calculate the temperature at the center of the IC.