SNIS233A February   2024  – July 2024 TMP110

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 Decoding Temperature Data
      3. 7.3.3 Temperature Limits and Alert
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous-Conversion Mode
      2. 7.4.2 One-Shot Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
      2. 7.5.2 Bus Overview
      3. 7.5.3 Device Address
      4. 7.5.4 Bus Transactions
        1. 7.5.4.1 Writes
        2. 7.5.4.2 Reads
        3. 7.5.4.3 General Call Reset Function
        4. 7.5.4.4 SMBus Alert Response
        5. 7.5.4.5 Time-Out Function
        6. 7.5.4.6 Coexist on I3C Mixed Bus
  9. 8 Register Map
    1. 8.1 Temp_Result Register (address = 00h) [reset = xxxxh]
    2. 8.2 Configuration Register (address = 01h) [reset = 60A0h]
    3. 8.3 TLow_Limit Register (address = 02h) [reset = 4B00h]
    4. 8.4 THigh_Limit Register (address = 03h) [reset = 5000h]
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Equal I2C Pullup and Supply Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
      4. 9.2.4 Power Supply Recommendations
    3. 9.3 Layout
      1. 9.3.1 Layout Guidelines
      2. 9.3.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.6 I2C Interface Timing

minimum and maximum specifications are over –40°C to 125°C and V+ = 1.14V to 5.5V (unless otherwise noted)(1)
FAST MODE FAST MODE PLUS UNIT
MIN MAX MIN MAX
f(SCL) SCL operating frequency 1 400 1 1000 kHz
t(BUF) Bus-free time between STOP and START conditions 0.6 0.5 µs
t(SUSTA) Repeated START condition setup time 0.6 0.26 µs
t(HDSTA) Hold time after repeated START condition.
After this period, the first clock is generated.		 0.6 0.26 µs
t(SUSTO) STOP condition setup time 0.6 0.26 µs
t(HDDAT) Data hold time(2) 100 900 12 150 ns
t(SUDAT) Data setup time 100 50 ns
t(LOW) SCL clock low period 1.3 0.5 µs
t(HIGH) SCL clock high period 0.6 0.26 µs
t(VDAT) Data valid time (data response time)(3) 0.9 0.45 µs
tR SDA, SCL rise time 300 120 ns
tF SDA, SCL fall time 300 20 x
(V+ / 5.5V)		 120 ns
ttimeout Timeout (SCL = GND or SDA = GND) 30 30 ms
tLPF Glitch suppression filter 50 50 ns
(1) The controller and device have the same V+ value. Values are based on statistical analysis of samples tested during initial release.
(2) The maximum t(HDDAT) can be 0.9µs for fast mode, and is less than the maximum t(VDAT) by a transition time.
(3) t(VDAT) = time for data signal from SCL LOW to SDA output (HIGH to LOW, depending on which is worse).