SNLA261A August 2016 – March 2024 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83825I , DP83826E , DP83826I , DP83867CR , DP83867CS , DP83867E , DP83867IR , DP83867IS , DP83869HM
Byte Mask = 00-FF-FF-FF-FF-FF-FF-FF (Masking Bytes 8 to 63 of the 64-byte pattern)
Pattern = 01-23-45-67-89-AB-CD-EF (First eight Bytes programmed, Byte 8 to Byte 63 default to ‘0’ since they are don’t cares due to Byte Mask)
To enable Custom Pattern detection with pulse (8 clock cycles) indication on COL use the following register writes:
Step | Register | Value | Description |
---|---|---|---|
1 | 04A8 | 2301 | Pattern Bytes 0 and 1 |
2 | 04A9 | 6745 | Pattern Bytes 2 and 3 |
3 | 04AA | AB89 | Pattern Bytes 4 and 5 |
4 | 04AB | EFCD | Pattern Bytes 6 and 7 |
5 | 04C8 | FF00 | Byte Mask 0 to 15 |
6 | 04C9 | FFFF | Byte Mask 16 to 31 |
7 | 04CA | FFFF | Byte Mask 32 to 47 |
8 | 04CB | FFFF | Byte Mask 48 to 63 |
9 | 0463 | 0002 | Configures COL pin for WoL Indication |
10 | 04A0 | 0082 | WoL Enabled, Pulse Indication, 8 clock cycles |