The section describing Hardware Bootstraps Configuration in the DP83826 Deterministic, Low-Latency, Low-Power, 10/100 Mbps, Industrial Ethernet PHY data sheet describes how the device can be configured without using the Serial Management Interface (SMI). This section of the data sheet presents configuration options in each mode: ENHANCED and BASIC. If SMI is not used to program the PHY, the DP83826 must be hardware set up in Enhanced mode to enable EtherCAT functionality.

When setting up the PHY to work in an EtherCAT® system, it is important that the PHY has an LED which is set up to show 100 Mbit full duplex and the signal polarity is active low or configurable for some ESCs.

To define the LED polarity, the following circuit can be used to make either active-high or -low polarity configuration. The PHY has an internal circuit which measures the polarity that is needed and automatically configures depending on the input signal. The figure below shows the recommended networks for an active high pulldown strap circuit and an active low pull-up circuit. R_P is used to define the strap network, while R_CL is a current limiting resistor to protect the LED component.

Figure 3-2 Example Strap Connections

In some cases, pending the strap settings this automatic LED feature has been disabled, see section 9.4.1, Hardware Bootstrap Configuration, in data sheet for more details.

Table 3-1 can be used to determine resistor values for bootstrapping the PHY.

Figure 3-3 Enhanced Bootstrap Flowchart

The information in this table shows that fast link down must be enabled in a special way. Only enable Fast link Down using RX Error Count as a detection feature. When setting up the DP83826 device to work in an EtherCAT system using Enhanced mode, use the configuration shown in Table 3-2.