SNLA438 September   2023 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83826E , DP83826I , DP83867CS , DP83867E , DP83867IS , DP83869HM

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2PROFINET Specification Requirements
  6. 3Ethernet PHY Setup
    1. 3.1 DP83822
      1. 3.1.1 DP83822 Hardware Bootstrap Configurations
      2. 3.1.2 DP83822 Register Configuration
    2. 3.2 DP83826
      1. 3.2.1 DP83826 Hardware Bootstrap Configuration
      2. 3.2.2 DP83826 Register Configuration
    3. 3.3 DP83867
      1. 3.3.1 DP83867 Hardware Bootstrap Configurations
      2. 3.3.2 DP83867 Register Configuration
    4. 3.4 DP83869
      1. 3.4.1 DP83869 Hardware Bootstrap Configurations
      2. 3.4.2 DP83869 Register Configuration
  7. 4Summary
  8. 5References

3.4.1 DP83869 Hardware Bootstrap Configurations

The DP83869HM uses many of the functional pins as strap options to place the device into specific modes of operation. The values of these pins are sampled at power up or hard reset.

GUID-9F0A2790-6E7A-41B4-BDF4-F8D022685D16-low.gif Figure 3-8 Strap Circuit

The bootstrap selection for the DP83869 is mainly controlled by three pins: JTAG_TDO/GPIO_1, RX_D3, and RX_D2. These pins represent bits for OPMODE[0..2], the table below summarizes the different functional modes that can be selected using these pins.

Note: DP83869 cannot be strapped into MII Mode.

MII Mode only works for 100Base-TX/100Base-FX and must be configured via Register Writes by de-advertising gigabit capabilities.

Table 3-8 Functional Mode Strap Table
PIN NAME STRAP NAME PIN # DEFAULT OPMODE[2] OPMODE[1] OPMODE[0] FUNCTIONAL MODES
JTAG_TDO/GPIO_1 OPMODE[0] 22 0 0 0 0 RGMII to Copper (1000Base-T/100Base-TX/10Base-Te)
0 0 1 RGMII to 1000Base-X
RX_D3 OPMODE[1] 36 0 0 1 0 RGMII to 100Base-FX
0 1 1 RGMII-SGMII Bridge Mode
RX_D2 OPMODE[2] 35 0 1 0 0 1000Base-T to 1000Base-X
1 0 1 100Base-T to 100Base-FX
1 1 0 SGMII to Copper (1000Base-T/100Base-TX/10Base-Te)
1 1 1 JTAG for boundary scan
Table 3-9 DP83869 100/1000 Copper Bootstrap Selection
DP83869 100Base-TX/1000Base-T Pin RH(kΩ) RL(kΩ) Remarks

MAC Interface: RGMII,

100Base-TX/1000Base-T,

Full Duplex,

Auto_MDIX,

Auto-Negotiation,

 JTAG_TDO Open 2.49

OPMODE: 000 RGMII to Copper,

1000Base-T/100Base-TX/10base-Te
RX_D3 Open 2.49
RX_D2 Open 2.49
LED_0 Open 2.49

Auto-negotiation,

10M speed disable,

Auto MDI-X
LED_1 2.49 Open
LED_2 Open 2.49
RX_CTRL Open 2.49 Port Mirroring Disabled
Table 3-10 DP83869 1000Base-X Fiber Bootstrap Selection
DP83869 1000Base-X Pin RH(kΩ) RL(kΩ) Remarks

MAC Interface: RGMII,

1000Base-X,

Full Duplex,

Auto_MDIX,

Auto-Negotiation,

 JTAG_TDO 2.49 Open

OPMODE: 001

RGMII to 1000Base-X
RX_D3 Open 2.49
RX_D2 Open 2.49
LED_0 Open 2.49 Fiber Auto-negotiation enabled
LED_1 2.49 Open Signal Detect Pin enabled
Table 3-11 DP83869 100Base-FX Fiber Bootstrap Selection
DP83869 100Base-FX Pin RH(kΩ) RL(kΩ) Remarks

MAC Interface: RGMII,

100Base-FX,

Full Duplex,

 JTAG_TDO Open 2.49

OPMODE: 010

RGMII to 100Base-FX
RX_D3 2.49 Open
RX_D2 Open 2.49
LED_1 2.49 Open Signal Detect Pin enabled