• Turn off the CLK_OUT pins or any unused clock sources for both DUT and Link Partner during the test. TI's PHY CLK_OUT pin can always generate 25MHz or 50MHz clock signal on the pins, resulting in unnecessary emissions to the surrounding when this feature is not used.
• Turn off TX/RX activity on the DUT/LP's LED pins. Verify none of the LED pins are configured in RX or TX activity mode. Constant LED blinking during TX/RX activity can result in extra radiated emissions for lower frequency ranges

• Use shorted cable lengths to minimize the effect of the cable
• Change the link partner board to the same as DUT board to factor out the issue on Link Partner board
• Shield both Link Partner and Ethernet cable with earth ground to eliminate the radiation effect of the non DUT board
• Enable loopback and remove the cable to isolate any radiated emission effects from the cable

If the above suggestions do not resolve RE test failure, the main emission source is likely the DUT. Reference the points below to investigate and address the root cause with schematic/layout optimizations.

• If the lower frequency ranges are failing, check the emission due to power rail circuitry, such as the switching frequency
• If the failing frequency borders 25MHz or the harmonics, the cause is likely the crystal or oscillator path
• If the failing frequency matches the MAC to PHY clock frequency, the cause is likely the MAC interface path
• If the failing frequency is close to the MDI frequency, the root cause is likely with the MDI interface path

The next section details how to isolate each of the above root causes from the DUT, depending on the failing frequency range.

• Configure Ethernet PHY in reset stage or low power mode.
  • Verify if the main emission are coming from external components on the board
• Disable or power off all other ICs. Only enable PRBS test on DUT and reverse loopback on the Link Partner side
  • This helps isolate noise generated by other components on the DUT board. Packets are still generated between the two PHYs when PRBS is enabled
• Enable MAC isolation to reduce the effect on the MAC side
  • MAC isolation is enabled with register 0x0[10], defined by the IEEE standard
  • This helps isolate emission sources between the MAC and PHY interface

• Cover possible emission sources with copper tape to isolate the root cause on DUT board:
  • Copper tape needs to be strongly connected to earth ground to absorb most of the emission noise. If the copper tape is not connected to earth ground properly, the copper tape can act as an antenna source , further amplifying the signals from the covered area
  • Verify there is an insulator between the copper tape and board components to prevent shorting between the parts
• Use copper tape to cover the area around the PHY’s IC only to see if PHY’s IC are the main radiated source
• Use copper tape to cover the clock signals (Crystal, Oscillator, RMII clock, MDC, and so on) to see if the clock sources are the main emission source
  • Impedance matching on signal ended clock signal can help with the emission on the clock signal lines.
• Use copper tape to cover the area around MDI lines to see if MDI lines are the main emission source
  • Reduce the length of MDI line and prevent the sharp turn on the MDI lines can reduce the emission on MDI lines
• Use copper tape to cover the area around the MAC to PHY interface trace to see if the MAC interface is the main emission source
  • Slew rate control can help to reduce the emission on the MAC interface
  • Bury MAC traces can also further reduce the emission on MAC interface

• After performing the debug procedures above to isolate the main emission source, please follow the schematic and layout recommendations to further optimize EMC/EMI performance of the design.