SNLS757B
June 2024 – November 2024
TUSB2E221
PRODMIX
1
1
Features
2
Applications
3
Description
4
Device Variants
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Timing Requirements
6.8
Typical Characteristics
7
Parametric Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
USB 2.0
8.3.2
eUSB2
8.3.3
Cross MUX
8.4
Device Functional Modes
8.4.1
Repeater Mode
8.4.2
Power-Down Mode
8.4.3
UART Mode
8.4.4
Auto-Resume ECR
8.4.5
L2 State Interrupt Modes
8.4.6
Attach Detect Interrupt Mode
8.4.7
GPIO Mode
8.4.7.1
EQ0 as GPIO0
8.4.7.2
EQ1 as GPIO1
8.4.7.3
EQ2/INT as GPIO2
8.4.8
CROSS
8.4.9
USB 2.0 High-Speed HOST Disconnect Detection
8.4.10
Frame Based Low Power Mode
8.5
Programming
8.5.1
I2C Target Interface
8.5.2
Register Access Protocol (RAP)
9
Register Map
9.1
TUSB2E221 Registers
10
Applications and Implementation
10.1
Application Information
10.2
Typical Application: Dual Port System
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
eUSB PHY Settings Recommendation
10.2.3
Application Curve
10.3
Power Supply Recommendations
10.3.1
Power-Up Reset
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Example Layout
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
7
Parametric Measurement Information
Figure 7-1
USB 2.0 TX Output (Egress) Jitter, Eye Mask Test Setup
Figure 7-2
eUSB2 TX Output (Ingress) Jitter, Eye Mask Test Setup