SNLS777A
May 2024 – June 2024
DP83TG721R-Q1
,
DP83TG721S-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Application Information
5.1
Time Synchronization
5.2
Integrated Audio Over Ethernet
5.3
TC10 Sleep/Wake-Up
5.4
DP83TG721 EVM-MC and Software Support
5.5
Comparison of Device Features
6
Device and Documentation Support
6.1
Receiving Notification of Documentation Updates
6.2
Support Resources
6.3
Trademarks
6.4
Electrostatic Discharge Caution
6.5
Glossary
7
Revision History
1
Features
IEEE802.3bp 1000BASE-T1 compliant
OA TC10 compliant, <20μA sleep current
Local and remote wake up and wake forwarding
Advanced TSN
IEEE 1588v2/802.1AS Time Synchronization
Hardware time-stamping with integrated phase correction
Highly accurate 1pps signal (±15ns)
Audio Clocking
AVB IEEE 1722 media clock generation capability
Phase synchronized wall clock output: 1KHz to 50MHz
I2S & TDM8 SCLK/FSYNC/MCLK clock generation
Open Alliance TC12 Interoperability and EMC compliant
OA EMC compliant
SAE J2962-3 EMC Compliant
Integrated LPF on MDI pins
MAC Interfaces: MII, RMII, RGMII, and SGMII
Supported I/O voltages: 3.3V, 2.5V, and 1.8V
Pin compatible with TI's 100BASE-T1 PHYs and 1000BASE-T1 PHYs
Single board design for 100BASE-T1 and 1000BASE-T1 with required BOM change
Diagnostic tool kit
Temperature, Voltage, ESD monitor
Data throughput calculator : Inbuilt MAC packet generator, counter and error checker
Signal Quality Indicator
TDR based open and short cable fault detection
CQI for cable degradation monitoring
Loopback modes
AEC-Q100 Qualified
IEC61000-4-2 ESD : ±8kV contact discharge