SNLU301 November   2021 SN75LVPE5412 , SN75LVPE5421

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Description
    1. 2.1  Redriver-Mux 5-Level I/O Control Inputs
    2. 2.2  Redriver-Mux Modes of Operation
    3. 2.3  Redriver-Mux SMBus or I2C Register Control Interface
    4. 2.4  Redriver-Mux Equalization Control
    5. 2.5  Redriver-Mux RX Detect State Machine
    6. 2.6  Redriver-Mux DC Gain Control
    7. 2.7  DS320PR412-421EVM Global Controls
    8. 2.8  DS320PR412-421EVM Downstream Devices Control
    9. 2.9  DS320PR412-421EVM Upstream Devices Control
    10. 2.10 Quick-Start Guide (Pin Mode)
    11. 2.11 Quick-Start Guide (SMBus Slave Mode)
  4. 3Schematics
  5. 4PCB Layouts
  6. 5Bill of Materials

Quick-Start Guide (Pin Mode)

Check that the shunts are at the following positions as shown in Table 2-10.
Table 2-10 Pin Mode Shunt Configuration
SHNT# HEADER SHUNT ACROSS PINS
1 J1 - J4 1-2
2 JMP7 1-2
3 JMP8 2-3
4 JMP17 2-3
5 JMP18 2-3
6 JMP19 2-3
7 J17 1-2, 3-4
8 J18 1-2, 3-4
9 J19 1-2, 3-4
10 J20 1-2, 3-4
11 J21 1-2, 3-4
12 JMP1 1-2
13 JMP2 3-4
14 JMP3 1-2
15 J30 N/C
16 J23 N/C
17 JMP4 1-2
18 JMP5 3-4
19 JMP6 1-2
20 J24 N/C
21 J25 N/C
22 JMP9 1-2
23 JMP10 3-4
24 JMP11 1-2
25 J26 N/C
26 J27 N/C
27 JMP14 1-2
28 JMP15 3-4
29 JMP16 1-2
30 J28 N/A
31 J29 N/A

The redrivers are configured to operate in Pin Mode (MODE pins tied to L0).

  1. RX_Detect state machine of all redrivers is enabled by leaving RX_DET pin open.
  2. The redrivers are enabled (PWDN pins tied to GND).
  3. The board is configured for any PCIe bus width.
  4. DC Gain of all redrivers is set to 0 dB by leaving the GAIN config pin open for the redrivers.
  5. EQ level is set to CTLE index 5.
  6. If necessary, adjust EQ levels of the downstream and upstream redrivers.
  7. Plug the EVM into a PCIe x16 server motherboard slot. Ensure the motherboard is powered down before installing the EVM or configured for hot-plug operation.
  8. Install a compatible PCIe endpoint card into one of the PCIe connectors on the EVM based on configuration of the SEL pin. Note: PCIe-A requires enabling bifurcation on the motherboard.
  9. Power-up the motherboard.