SNOSDE0A February   2022  – May 2022 LM74502-Q1 , LM74502H-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage (VS)
      2. 9.3.2 Charge Pump (VCAP)
      3. 9.3.3 Gate Driver (GATE an SRC)
        1. 9.3.3.1 Inrush Current Control
      4. 9.3.4 Enable and Undervoltage Lockout (EN/UVLO)
      5. 9.3.5 Overvoltage Protection (OV)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Conduction Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Design Considerations
        2. 10.2.2.2 MOSFET Selection
        3. 10.2.2.3 Overvoltage Protection
        4. 10.2.2.4 Charge Pump VCAP, Input and Output Capacitance
      3. 10.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 10.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 10.2.5 Application Curves
    3. 10.3 Surge Stopper Using LM74502-Q1, LM74502H-Q1
      1. 10.3.1 VS Capacitance, Resistor R1 and Zener Clamp (DZ)
      2. 10.3.2 Overvoltage Protection
      3. 10.3.3 MOSFET Selection
    4. 10.4 Fast Turn-On and Turn-Off High Side Switch Driver Using LM74502H-Q1
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

7.6 Switching Characteristics

TJ = –40°C to +125°C; typical values at TJ = 25°C, V(VS) = 12 V, CIN = C(VCAP) = COUT = 0.1 µF, V(EN/UVLO) = 3.3 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ENTDLY EN high to Gate Turn-on delay V(VCAP) > V(VCAP UVLOR), V(EN/UVLO)  step from (0 V to  > V(EN_UVLOR) ) , V(GATE-SRC) > 5 V, C(GATE-SRC) = 4.7 nF, LM74502H-Q1 75 110 µs
tEN_OFF(deg)_GATE GATE Turn-off delay during EN/UVLO V(EN/UVLO) ↓ to V(GATE-SRC) < 1 V, C(GATE-SRC) = 4.7 nF 2 µs
tOVP_OFF(deg)_GATE GATE Turn-off delay  during OV V(OV) ↑ to V(GATE-SRC) < 1 V, C(GATE-SRC) = 4.7 nF 0.6 1 µs
tOVP_ON(deg)_GATE GATE Turn-on delay during OV V(OV) ↓ to V(GATE-SRC) > 5 V, C(GATE-SRC) = 4.7 nF
LM74502H-Q1,		 5 10 µs