SNVAA98 January   2024 LM25148 , LM74910-Q1 , TPS38700 , TPS389006 , TPS389006-Q1 , TPS628301 , TPS628302 , TPS628303 , TPS6287B10 , TPS6287B15 , TPS6287B20 , TPS6287B25 , TPS746

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Design Parameters
  6. Schematics
  7. Design Considerations
  8. Front-End Protection
  9. 3.3V Always-ON Bias Supply
  10. 5V Pre-Regulator Buck Converter
  11. Low-Voltage High-Current Core Rail Buck Converter
  12. On-Board Core Rail Output Load Transient Stepper
  13. 10Multiple Peripheral Rail Buck Converters Sub-Circuits Schematic
  14. 11Voltage Supervisor and Sequencer
  15. 1212-Channel Sequencer Alternative
  16. 13Summary
  17. 14References

On-Board Core Rail Output Load Transient Stepper

GUID-20231120-SS0I-93CW-4MLP-MSQ3Z5C4JTJ7-low.svg Figure 9-1 On-Board Core Rail Output Load Transient Stepper Sub-Circuit Schematic

The on-board load transient stepper shown is intended to be used with the low-voltage core rail buck converter. The benefit of having a dedicated, on-board load stepper is for faster load transient slew rates. This is achieved by having the load stepping FETs and current sense resistor as close to the converter output as possible, thus reducing parasitic trace inductance as much as possible.

This sub-circuit is comprised of a pulse generator, a FET gate driver, FET switches and a load resistor, which also serves as a current sense resistor. The load stepper pulses are generated by a TLC555 timer, configured as an astable multivibrator or oscillator, generating a free-running train of load step pulses. The HIGH pulse time is approximately programmed to be 1ms, which takes place about once every second. If desired, this on-board timer output can be overridden by an external load step signal provided by the user, at the TP19 Ext. Pulse test-point. Make sure the load step pulse duration and duty cycle do not exceed the safe operating area and thermal limits of the power FETs and the current sense resistor of the load stepper. The load step current can be set by using an appropriately selected load resistor value for R73, or R74. Remember to account for the total equivalent Rds_ON of the FET(s) used, since these are in series to the current sense resistor. The load current can be measured using an oscilloscope connected to the J16 Isns_Core connector and is represented as a voltage across the current sense resistor. The load current will essentially be determined by dividing this measured voltage by the load resistor value. For example, in the provided schematic, with the current sense resistor of 0.06Ω, the scale will be 60mV/A, or another way is to look at it as an inverse, that is 16.7A/V. The load step rising-and-falling edge slew rates can each be controlled/adjusted (within limits) by the R63 and R70 potentiometers. The fastest possible for both rising and falling pulse edges can be achieved by installing/shorting the J15 jumper, essentially bypassing the two potentiometers.