SNVAA98 January 2024 LM25148 , LM74910-Q1 , TPS38700 , TPS389006 , TPS389006-Q1 , TPS628301 , TPS628302 , TPS628303 , TPS6287B10 , TPS6287B15 , TPS6287B20 , TPS6287B25 , TPS746
For the low-voltage core rail, a 2-phase interleaved synchronous Buck converter is implemented using two of the TPS6287B25 regulator IC. This device can be used as a single-phase converter, or can be daisy-chained with other TPS6287B25 ICs to work together as an interleaved system. For the VE2302 device, a 2-phase TPS6287B25 design is implemented, with each phase switching at 1.5MHz. Phase 2 can be programmed to have a 180-degree phase shift from Phase 1, leading to an interleaved design, with an effective switching frequency of 3MHz. The TPS6287B25 has I2C capability, which can be used to program various features, functions, and parameters (see device data sheet for details). When configured as a multi-phase converter, the first phase device in the chain of devices becomes the main controller. This is the device that I2C communication is made with, as well as sets and dictates to the other phases, the output voltage setpoint, the compensation voltage, and main synchronization clock. To be able to provide significant amount of current in a very short time window, features like droop compensation implemented in TPS6287B25, selectable through I2C, helps to reduce overshoot and undershoot of the core voltage during steep load variations. Table 8-1 shows the IC pin functions for the primary/control phase device and the non-primary phase devices.
Alternative inductor options include: SLC1480-111MLB, SLR7010-101KED, SLC1049-101MLB
Pin Name | Primary Phase/Device Function | Non-Primary Phase/Device Function |
---|---|---|
VIN | Input voltage; connect to Vin | Input voltage; connect to Vin |
EN | Enable pin; gang all phase EN pins together | |
MODE/SYNC | Sets the operating mode for all phases | Switching clock input received from preceding phase |
SYNC_OUT | Switching clock output to drive next phase | Switching clock output to drive next phase unless no other phases to drive |
VSET1 | Configures and sets default output voltage | No function; GND this pin |
VSET2 | Configures and sets default output voltage | No function; GND this pin |
SCL | I2C clock | No function; GND this pin |
SDA | I2C data | No function; GND this pin |
SW | Switch node; connect to power inductor | |
VOSNS | Output rail positive node remote sense | Output rail positive node remote sense; connect to positive of local output capacitor |
GOSNS | Output rail GND node remote sense | Output rail GND node remote sense; connect to GND of local output capacitor |
COMP | Compensation network pin; gang all COMP pins together | |
PG | Power good output; gang all PG pins together | |
AGND | Analog ground; perform proper connection as shown in data sheet or evaluation board | |
GND | Power ground; perform proper connection as shown in data sheet or evaluation board | |
EP | Exposed pad; connect to power ground and flood GND polygon pour to dissipate heat; see data sheet or evaluation board for details |