SNVSAU3B December   2017  – October 2019 LM76002-Q1 , LM76003-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
    2.     Efficiency vs Output Current (VOUT = 5 V, fSW = 400 kHz, Auto Mode)
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 System Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency, Peak-Current-Mode Control
      2. 7.3.2  Light Load Operation Modes — PFM and FPWM
      3. 7.3.3  Adjustable Output Voltage
      4. 7.3.4  Enable (EN Pin) and UVLO
      5. 7.3.5  Internal LDO, VCC UVLO, and Bias Input
      6. 7.3.6  Soft Start and Voltage Tracking (SS/TRK)
      7. 7.3.7  Adjustable Switching Frequency (RT) and Frequency Synchronization
      8. 7.3.8  Minimum On-Time, Minimum Off-Time, and Frequency Foldback at Dropout Conditions
      9. 7.3.9  Internal Compensation and CFF
      10. 7.3.10 Bootstrap Voltage and VBOOT UVLO (BOOT Pin)
      11. 7.3.11 Power Good and Overvoltage Protection (PGOOD)
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
      4. 7.4.4 CCM Mode
      5. 7.4.5 DCM Mode
      6. 7.4.6 Light Load Mode
      7. 7.4.7 Foldback Mode
      8. 7.4.8 Forced Pulse-Width-Modulation Mode
      9. 7.4.9 Self-Bias Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Setpoint
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Input Capacitors
        5. 8.2.2.5  Inductor Selection
        6. 8.2.2.6  Output Capacitor Selection
        7. 8.2.2.7  Feed-Forward Capacitor
        8. 8.2.2.8  Bootstrap Capacitors
        9. 8.2.2.9  VCC Capacitors
        10. 8.2.2.10 BIAS Capacitors
        11. 8.2.2.11 Soft-Start Capacitors
        12. 8.2.2.12 Undervoltage Lockout Setpoint
        13. 8.2.2.13 PGOOD
        14. 8.2.2.14 Synchronization
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Highlights
      2. 10.1.2 Compact Layout for EMI Reduction
      3. 10.1.3 Ground Plane and Thermal Considerations
      4. 10.1.4 Feedback Resistors
    2. 10.2 Layout Example
    3. 10.3 Thermal Design
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.3.6 Soft Start and Voltage Tracking (SS/TRK)

The LM76002-Q1/LM76003-Q1 has a flexible and easy-to-use start-up rate control pin: SS/TRK. The soft-start feature is to prevent inrush current impacting the LM76002-Q1/LM76003-Q1, and its supply when power is first applied. Soft start is achieved by slowly ramping up the target regulation voltage when the device is first enabled or powered up. The simplest way to use the device is to leave the SS/TRK pin open circuit or floating. The LM76002-Q1/LM76003-Q1 employs the internal soft-start control ramp and starts up to the regulated output voltage in 6.3 ms typically. In applications with a large amount of output capacitors, higher VOUT, or other special requirements, the soft-start time can be extended by connecting an external capacitor CSS from SS/TRK pin to AGND. Extended soft-start time further reduces the supply current required to charge up output capacitors and supply any output loading. An internal current source (ISSC = 2.2 μA) charges CSS and generates a ramp from 0 V to VFB to control the ramp-up rate of the output voltage. For a desired soft-start time tSS, the capacitance for CSS can be found by Equation 5:

Equation 5. CSS = ISSC × tSS

where

  • CSS = soft-start capacitor value (µF)
  • ISSC = soft-start charging current (µA)
  • tSS = desired soft-start time (s)

The soft-start capacitor CSS is discharged by an internal FET when VOUT is shut down by hiccup protection or ENABLE = logic low. When a large CSS is applied, and EN is toggled low only for a short period of time, CSS may not be fully discharged. The next soft-start ramp follows internal soft-start ramp before reaching the leftover voltage on CSS and then follows the ramp programmed by CSS. If this is not acceptable for a certain application, an R-C low-pass filter can be added to EN to slow down the shutting down of VCC, allowing more time to discharge CSS.

The LM76002-Q1/LM76003-Q1 is capable of start-up into pre-biased output conditions. When the inductor current reaches zero, the LS switch is turned off to avoid negative current conduction. This operation mode is also called diode emulation mode. It is built in by the DCM operation in light loads. With a pre-biased output voltage, the LM76002-Q1/LM76003-Q1 waits until the soft-start ramp allows regulation above the pre-biased voltage and then follows the soft-start ramp to the regulation level. When an external voltage ramp is applied to the SS/TRK pin, the LM76002-Q1/LM76003-Q1 FB voltage follows the ramp if the ramp magnitude is lower than the internal soft-start ramp. A resistor divider pair can be used on the external control ramp to the SS/TRK pin to program the tracking rate of the output voltage. The final voltage detected by the SS/TRK pin must not fall below 1.2 V to avoid abnormal operation

VOUT tracked to an external voltage ramp has the option of ramping up slower or faster than the internal voltage ramp. VFB always follows the lower potential of the internal voltage ramp and the voltage on the SS/TRK pin. Figure 14 shows resistive divider connection if external ramp tracking is desired.

LM76002-Q1 LM76003-Q1 soft_start_track.gifFigure 14. Soft-Start Tracking External Ramp

Figure 15 shows the case when VOUT ramps more slowly than the internal ramp, while Figure 16 shows when VOUT ramps faster than the internal ramp. Faster start-up time may result in inductor current tripping current protection during start-up. Use with special care.

LM76002-Q1 LM76003-Q1 tracking_slow.gifFigure 15. Tracking With Longer Start-up Time Than The Internal Ramp
LM76002-Q1 LM76003-Q1 tracking_fast.gifFigure 16. Tracking With Shorter Start-up Time Than The Internal Ramp

The LM76002-Q1/LM76003-Q1 is capable of start-up into pre-biased output conditions. During start-up the device sets the minimum inductor current to zero to avoid discharging a pre-biased load.