SNVSBU7 September 2020 LM34966-Q1
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Line Undervoltage Lockout (UVLO/SYNC/EN Pin)
- 8.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)
- 8.3.3 Soft Start (SS Pin)
- 8.3.4 Switching Frequency (RT Pin)
- 8.3.5 Clock Synchronization (UVLO/SYNC/EN Pin)
- 8.3.6 Current Sense and Slope Compensation (CS Pin)
- 8.3.7 Current Limit and Minimum On-time (CS Pin)
- 8.3.8 Feedback and Error Amplifier (FB, COMP Pin)
- 8.3.9 Power-Good Indicator (PGOOD Pin)
- 8.3.10 Hiccup Mode Overload Protection
- 8.3.11 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
- 8.3.12 MOSFET Driver (GATE Pin)
- 8.3.13 Overvoltage Protection (OVP)
- 8.3.14 Thermal Shutdown (TSD)
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
7.6 Typical Characteristics
Figure 7-1 Frequency vs RT Resistance
Figure 7-3 VVCC vs IVCC
Figure 7-5 Peak Current Limit vs Duty Cycle
Figure 7-7 FB Reference vs Temperature
Figure 7-9 IOPERATING(BIAS) Including RT Current vs
VBIAS
Figure 7-11 ISHUTDOWN vs Temperature (BIAS = 12 V)
Figure 7-13 ISS vs Temperature
Figure 7-15 Maximum Duty Cycle vs Frequency
Figure 7-2 Frequency vs Temperature
Figure 7-4 VVCC vs VBIAS (No Load)
Figure 7-6 Current Limit Threshold vs Temperature
Figure 7-8 EN Threshold vs Temperature
Figure 7-10 ISHUTDOWN(BIAS) vs VBIAS
Figure 7-12 tON(MIN) vs Frequency
Figure 7-14 UVLO Threshold vs Temperature