SNVU663A June   2019  – May 2021 LP87524-Q1 , LP87524B-Q1 , LP87524J-Q1 , LP87524P-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Setup
    1. 2.1 SCL/SDA Pins
    2. 2.2 NRST Pin
    3. 2.3 ENx (GPIOx) Pins
    4. 2.4 nINT
  4. 3Configuration
    1. 3.1 Default OTP Configurations
      1. 3.1.1 LP87524B-Q1 OTP Configuration
        1. 3.1.1.1 Startup and Shutdown Sequence
      2. 3.1.2 LP87524J-Q1 OTP Configuration
        1. 3.1.2.1 Startup and Shutdown Sequence
      3. 3.1.3 LP87524P-Q1 OTP Configuration
        1. 3.1.3.1 Startup and Shutdown Sequence
  5. 4References
  6. 5Revision History

1 Introduction

The LP87524B/J/P-Q1 contains four step-down DC/DC converter cores, which are configured as 4 single phase outputs. These devices power AWR1642 and AWR1243 automotive radar devices and IWR1642 industrial radar devices.

This technical reference manual can be used as a reference for the LP87524B/J/P-Q1 default register bits after OTP memory download. This technical reference manual does not provide information about the electrical characteristics, external components, package, or the functionality of the device. For this information and the full register map, refer to the LP87524B/J/P-Q1 Four 4-MHz Buck Converters for AWR and IWR MMICs datasheet.