Intelligent LLC SR Control Using C2000 and UCD7138

Abstract

In order to achieve reliable and intelligent synchronous rectification (SR) control for LLC resonant converters, this application report provides a detailed guidance on how to leverage C2000™ devices advanced features together with UCD7138 low-side MOSFET driver. The proposed schemes could help minimize the body diode conduction time to optimize the system efficiency and prevent the negative current risks for robust operation.

Trademarks

C2000™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

1 Introduction

LLC resonant converters are becoming increasingly popular in industry power applications. In order to achieve higher efficiency, the rectification diodes are replaced with SR MOSFETs to reduce the conduction losses. And it is common to use digital control for LLC converters due to flexibility and scalability, especially in higher power level applications. The SR control signals usually follow the primary side PWM signals, and the desired SR driving signal under different switching frequency f_S is given in Figure 1-1 [1]. With digital control schemes, SR operation could be divided into two modes: the SR pulse width is equal to approximately half of the switching period if f_S is above the LLC resonant frequency; the SR turn-off edge is determined by approximately half of the resonant period if below or equal to resonant frequency, that is SR clamp mode. However, the present schemes could not ensure the turn-on and turn-off edges are exactly at the SR current zero crossing point, which will vary during different load and input voltage conditions. Turning the SR on/off too early or too late will result in lower efficiency, negative current, or high drain-to source stresses, especially during the load/line transient operation [2].

Figure 1-1 Desired SR Driving Signal Under Different f_S

In order to solve the SR control challenges, a smart gate driver UCD7138 was released with body-diode conduction sensing in the market. The UCD7138 gate driver senses the body diode conduction of the SR and reports to UCD3138A(A version of UCD3138 controllers), to achieve adaptive SR on-time control [3]. However, the turn-off edge optimization is handled by the DTC interface of UCD3138A, which also limits UCD7138’s usage with other MCUs. The application report discusses how to use C2000 devices together with UCD7138 to provide an intelligent SR control scheme, mainly with the below three control targets, which it is challenging for conventional solutions to achieve.

Minimize the body diode conduction time for high efficiency
Fast negative current prevention for robust operation
Automatically compensate the component variations during the SR clamp mode

The proposed control schemes apply for any third-generation of C2000 devices with configurable logic block (CLB) module inside.

2 SR Turn-On Edge Optimization

Figure 2-1 shows the system diagram for C2000 and UCD7138. Normally, digital control scheme will make the SR turn-on edge aligned with the primary side PWM, and further add the rising edge delay to the SR PWM signals. However, a fixed or larger than required rising edge delay could not provide optimal efficiency, due to longer body diode conduction time. Actually, using UCD7138 could optimize the turn-on edge essentially, with CTRL pin floating or connected to logic high (3.3 V).

Figure 2-1 C2000 and UCD7138 System Diagram

Figure 2-2 shows the turn-on edge optimization scheme with UCD7138. IN is the gate-driver input-command signal from the digital controller, like C2000, and OUT is the SR-gate driver output signal. The DTC pin is the body-diode conduction detector output, and when the body diode of SR MOSFETs conducts, the DTC pin is low.

The actual gate turn-on timing is controlled by both the digital controller output IN and DTC. The OUT can only be turned on when IN is high. If DTC is already low at IN rising edge, turn on the gate driver output immediately; if DTC is still high at IN rising edge, turn on the gate driver output as soon as the DTC falling edge is received. While, the gate turn-off edge is determined by IN only. The gate is turned off immediately at the IN falling edge.

Thus, to make sure the turn-on edge to optimize freely, users could simply set the same rising edge for IN as the primary side PWM with C2000.

Figure 2-2 Turn-On Edge Optimization