SPRACM3E August   2021  – January 2023 F29H850TU , F29H859TU-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   Using the Fast Serial Interface (FSI) With Multiple Devices in an Application
  2.   Trademarks
  3. 1Introduction to the FSI Module
  4. 2FSI Applications
  5. 3Handshake Mechanism
    1. 3.1 Daisy-Chain Handshake Mechanism
    2. 3.2 Star Handshake Mechanism
  6. 4Sending and Receiving FSI Data Frames
    1. 4.1 FSI Data Frame Configuration APIs
    2. 4.2 Start Transmitting Data Frames
  7. 5Daisy-Chain Topology Tests
    1. 5.1 Two Device FSI Communication
      1. 5.1.1 CPU Control
      2. 5.1.2 DMA Control
      3. 5.1.3 Hardware Control
    2. 5.2 Three Device FSI Communication
      1. 5.2.1 CPU/DMA Control
      2. 5.2.2 Hardware Control
        1. 5.2.2.1 Skew Compensation for Three Device Daisy-Chain System
          1. 5.2.2.1.1 CPU/DMA control
          2. 5.2.2.1.2 Hardware Control
  8. 6Star Topology Tests
  9. 7Event Synchronization Over FSI
    1. 7.1 Introduction
      1. 7.1.1 Requirement of Event Sync for Distributed Systems
      2. 7.1.2 Solution Using FSI Event Sync Mechanism
      3. 7.1.3 Functional Overview of FSI Event Sync Mechanism
    2. 7.2 C2000Ware FSI EPWM Sync Examples
      1. 7.2.1 Location of the C2000Ware Example Project
      2. 7.2.2 Summary of Software Configurations
        1. 7.2.2.1 Lead Device Configuration
        2. 7.2.2.2 Node Device Configuration
      3. 7.2.3 1 Lead and 2 Node F28002x Device Daisy-Chain Tests
        1. 7.2.3.1 Hardware Setup and Configurations
        2. 7.2.3.2 Experimental Results
      4. 7.2.4 1 Lead and 8 Node F28002x Device Daisy-Chain Tests
        1. 7.2.4.1 Hardware Setup and Configurations
        2. 7.2.4.2 Experimental Results
      5. 7.2.5 Theoretical C2000 Uncertainties
    3. 7.3 Additional Tips and Usage of FSI Event Sync
      1. 7.3.1 Running the Example
      2. 7.3.2 Target Configuration File
      3. 7.3.3 Usage of Event Sync for Star Configuration
  10. 8References
  11. 9Revision History

Start Transmitting Data Frames

There are four methods to trigger the data transmission, including software triggered, externally triggered (EPWMx-SOCA/B),using the DMA and hardware pass-through feature. For the software triggering method, writing 1 to the TX_FRAME_CTRL.START register bit, or using the driverLib function “FSI_startTxTransmit()”, will start the transmission. If using an external trigger, like EPWMx-SOCA, once the external trigger signal occurs, the data will be sent.

Since the DMA trigger can be generated every time a data frame transmission or receiving is completed from the FSITX or FSIRX module, it provides a convenient method to transfer and store data, especially with a mass amount of data. Here a configuration example is given for the FSI communication using DMA.

TX_OPER_CTRL_LO.START_MODE must be set to 0x2, which means writing to frame tag/user data fields can trigger the transmission and then enables a DMA event on FSITX:

FSI_setTxStartMode(FSITXA_BASE, FSI_TX_START_FRAME_CTRL_OR_UDATA_TAG);
FSI_enableTxDMAEvent(FSITXA_BASE);

Two consecutive DMA channels are needed to fill the transmit buffer and frame tag/user data fields, respectively. Using the two channels in sequence allows for the transmission to start right after the frame tag and user data are set, as configured in the TX_OPER_CTRL_LO.START_MODE register bits. In the example code, DMA CH1 and DMA CH2 are used. Another important point is that the wrap control must be enabled for data of more than 16 words, since the FSI transmit buffer is a 16-word circular buffer.

DMA_configWrap(DMA_CH1_BASE, DMA_TRANSFER_SIZE_IN_BURSTS, 0, dest_WrapSize, 0);

Here, dest_WrapSize represents the number of bursts to be transferred before a wrap of the destination address, so dest_WrapSize should be 16/ nWords. This can be implemented such that the transmit buffer is continuously fed by the DMA, which is triggered by FSITX in return, with DMA Continuous Mode enabled.

The FSIRX is configured very similarly to the FSITX, except for that there is no order requirement for the DMA channels for RX buffer and tag and user data. In the example projects, DMA CH3 and DMA CH4 are used.

The hardware pass-through feature allows the incoming packet to be transmitted while it is being received in each node device. This way, unlike other modes of triggering, each device does not have to wait until the packet is received in order to transmit it to the next device in the daisy chain. For more details on this feature, refer to F280039C device TRM. To enable this feature, the TX_OPER_CTRL_LO.TDM_ENABLE and TX_OPER_CTRL_LO.SEL_TDM_IN register fields have to be set. Alternatively, below driverLib functions can be used.

FSI_enableTxTDMMode(FSITXA_BASE);
FSI_enableRxTDMMode(FSITXA_BASE);