SPRACO3 October   2019 INA240 , LMG5200 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   Dual-Axis Motor Control Using FCL and SFRA On a Single C2000 MCU
    1.     Trademarks
    2. 1 Introduction
      1. 1.1 Acronyms and Descriptions
    3. 2 Benefits of the C2000 for High-Bandwidth Current Loop
    4. 3 Current Loops in Servo Drives
    5. 4 PWM Update Latency for Dual Motor
    6. 5 Outline of the Fast Current Loop Library
    7. 6 Evaluation Platform Setup
      1. 6.1 Hardware
        1. 6.1.1 LAUNCHXL-F28379D or LAUNCHXL-F280049C
          1. 6.1.1.1 DACs
          2. 6.1.1.2 QEPs
        2. 6.1.2 Inverter BoosterPack - GaN + INA240
        3. 6.1.3 Two Motor Dyno
        4. 6.1.4 System Hardware Connections
        5. 6.1.5 Powering Up the Setup
      2. 6.2 Software
        1. 6.2.1 Incremental Build
        2. 6.2.2 Software Setup for Dual-Axis Servo Drive Projects
    8. 7 System Software Integration and Testing
      1. 7.1 Incremental Build Level 1
        1. 7.1.1 SVGEN Test
        2. 7.1.2 Testing SVGEN With DACs
        3. 7.1.3 Inverter Functionality Verification
      2. 7.2 Incremental Build Level 2
        1. 7.2.1 Connecting motor to INVs
        2. 7.2.2 Testing the Motors and INVs
        3. 7.2.3 Setting Over-current Limit in the Software
        4. 7.2.4 Setting Current Regulator Limits
        5. 7.2.5 Position Encoder Feedback
      3. 7.3 Incremental Build Level 3
        1. 7.3.1 Observation One – Latency
      4. 7.4 Incremental Build Level 4
        1. 7.4.1 Observation
        2. 7.4.2 Dual Motor Run With Speed Loop
      5. 7.5 Incremental Build Level 5
        1. 7.5.1 Dual Motor Run with Position Loop
      6. 7.6 Incremental Build Level 6
        1. 7.6.1 Integrating SFRA Library
        2. 7.6.2 Initial Setup Before Starting SFRA
        3. 7.6.3 SFRA GUIs
        4. 7.6.4 Setting Up the GUIs to Connect to Target Platform
        5. 7.6.5 Running the SFRA GUIs
        6. 7.6.6 Influence of Current Feedback SNR
        7. 7.6.7 Inferences
        8. 7.6.8 Phase Margin vs Gain Crossover Frequency
    9. 8 Summary
    10. 9 References

7.1.3 Inverter Functionality Verification

After verifying the space vector generation and PWM modules, the 3-phase inverter hardware can be tested by looking at inverter outputs U, V, and W on a scope. This can be compared against the PWM pulses fed into the inverter. It is advisable to gradually increase the DC bus voltage or change 'VdTesting' and 'VqTesting' values during this test. Check inverter outputs U, V, and W using an oscilloscope with respect to the inverter GND, while taking care of scope isolation requirements. This ensures that the inverter is working properly.

CAUTION

After verifying this, take the controller out of real time mode (disable), reset the processor. Note that after each test, this step needs to be repeated for safety purposes, otherwise an improper shutdown might halt the PWMs at certain states where the inverter can draw currents high enough to damage itself. Hence caution needs to be taken while doing these experiments.