SPRACZ9A November 2021 – December 2022 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
The F2800x devices contain varying numbers of the following control peripherals:
For specific control peripherals, their performance can be greatly impacted by the design of the board. Be sure to follow the layout guidelines outlined in Section 4 to reduce unwanted noise and maximize performance.
The Sigma-Delta Filter Module (SDFM) is available on TMS320F28003x and TMS320F28004x devices and is used with external sigma-delta modulators for current measurement and resolver position decoding in motor control applications. The SDFM makes use of an outside clock through its SDFM clock input pins, and its operation is susceptible to corruption if the clock is especially noisy. Special precaution should be taken on these signals to ensure a clean and glitch-free signal that meets the SDFM timing requirements detailed in the device-specific data sheet. Thus, it recommended to use series termination resistors for ringing due to any impedance mismatch of the clock driver and to space these traces away from other noisy signals. This helps to ensure proper SDFM functionality. Making use of the SDFM Synchronized GPIO (SYNC) option, (synchronizing the clock pins to PLLRAWCLK, can provide protection and help maintain SDFM operation against occasional clock glitches). It should be noted that there are limitations to its protection, so ensuring stable clocking is a top priority for proper SDFM function. For specific SDFM timing requirements, see the device-specific data sheet.