SPRAD14 April   2022 AM67 , AM67A , AM68 , AM68A , AM69 , AM69A , DRA821U , DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4AEN-Q1 , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VM , TDA4VM-Q1 , TDA4VP-Q1 , TDA4VPE-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Dual TDA4 System
    1. 2.1 Dual TDA4x SoC System Diagram
    2. 2.2 System Consideration and BOM Optimization
  4. 3Camera Connection
    1. 3.1 Duplicate Front Camera Input to Two TDA4x SoCs
    2. 3.2 Connect Front Camera to Only one TDA4x
  5. 4Boot Sequence Solution
    1. 4.1 Boot Solution Based on Dual Flash
    2. 4.2 Boot Solution Based on Single Flash
  6. 5Multi-SoC Demo Based on PCIe
  7. 6References

Introduction

Jacinto TDA4x processors family is a scalable platform with software-compatible products. Based on systems requirements, TDA4x SoC family offers multiple products with different performance, power and feature-set that customers can choose from. Currently, the TDA4VM is production and details can be found at TDA4VM product page [1]. Table 1-1 shows a typical IP configuration of TDA4VM. For more information, see the DRA829/TDA4VM Technical Reference Manual [2].

Table 1-1 TDA4VM Typical Configuration
Processor/Accelerator Interface
TDA4VM IP Arm Arm-R5F DSP GPU MMA DDR Capture PCIe Ethernet
Feature 2xA72
(~25K DMIPS)
3xDual R5F
(3x ~12KDMIPS)
1xC7x+
2xC66x
GE8430
(100 GFLOPs)
1xMMAv1 8TOPs 1x32b@4266Mhz 2x CSI-Rx (4L) PCIe Gen3: 4x 2DL 8pswitch+
1x RGMII (MCU)

Dual-TDA4x cascading solution may be required in below scenarios:

  • Performance Requirement
    • Performance requirements for general processing, deep learning and customers applications running on MPU, might be too high for a single SoC.
  • Function Safety
    • To meet functional safety requirements, a second TDA4x SoC might be required as a redundant SoCs as a backup system when main TDA4x device is abnormal.
  • Power and Thermal Consideration
    • Dual SoC solution provides better power and thermal distribution where system load can be distributed across SoCs to enable better power and thermal management.
  • IO Interfaces
    • In highly integrated system solutions, single SoC might not provide enough peripheral interfaces including camera , PCIe, Ethernet, CAN, LIN interfaces. Dual-SoC solution might be required to meet system interface requirements.

All the Jacinto TDA4VM SoCs are configured with Ethernet and PCIe interfaces. This means that all the TDA4x family processors can be interconnected via Ethernet and PCIe to enable dual-SoC system requirements. Next sections will discuss system considerations for such solution.