General
Review and verify the following for
the custom schematic design:
- Above section, including
relevant application notes
- The configured output voltage
and the required current rating for all the supply rails
- Output voltage feedback
connection and feedback divider resistors tolerance
- Selected discrete DC/DC
solution supports active discharge
- Slew rate meets the processor
requirements and sequencing of all the supply rails as per the processor
requirement
- MCU_PORz slew rate (connect
through discrete push pull buffer) and L to H delay (MCU_PORz hold time)
implementation after all the supplies ramp
- Voltage rating of the
selected capacitors considering derating (twice the worst-case applied
voltage is a commonly used guideline)
- Device selection
- Implementation of SD card
interface IO supply supporting UHS-I speed and eFuse programming VPP
supply
Schematic Review
Follow the below list for the custom
schematic design:
- The resistor divider value
including tolerance connected to the feedback input to generate the required
output supply voltage matches with the calculated value
- PG outputs have the required
pullup and connects to the other DC/DC or LDO EN for supply sequencing
- Supply rails output slew
rate
- MCU_PORz hold time after
supply ramp, in case the DC/DC PG output connects directly to the processor
MCU_PORz input
Additional
- In case power architecture is
based on TI power solutions, get detailed review of the power architecture
implementation done with the relevant BU/PL
- A 0Ω resistor or jumper is
recommended at the output of the supply rails for isolation or current
measurement for the initial board build