SPRAD26 April   2022 AM67 , AM67A , AM68 , AM68A , AM69 , AM69A , DRA821U , DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4AEN-Q1 , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VM , TDA4VM-Q1 , TDA4VP-Q1 , TDA4VPE-Q1

 

  1.   Trademarks
  2. 1SPI: Serial Peripheral Interface
  3. 2J7200/J721e MCSPI Support
    1. 2.1 MCSPI Features
  4. 3SPI: Master Mode Enabling and Validation on Linux
    1. 3.1 Enable SPI Instances of J721e/TDA4VM
    2. 3.2 Enable SPIDEV on TD4VM SDK
    3. 3.3 Exercise SPI From User Space on TI J7/TDA4x Using Standard Linux spidev_test Tool
  5. 4SPI: Slave Mode Enabling and Validation on Linux
    1. 4.1 Enable SPI Instances of J7200
    2. 4.2 Enable DMA for MCSPI4 Slave Node
    3. 4.3 Enable SPIDEV and SPI_SLAVE Configs
    4. 4.4 Test SPI Slave Functionality From User Space on TI J7200 Using Standard Linux spidev_test Tool
    5. 4.5 SPI Slave Testing Using spi-slave-time
    6. 4.6 Linux SPI Slave Challenges
    7. 4.7 Linux SPI Slave Mode General Limitations
    8. 4.8 McSPI SPI Slave Mode Limitations
  6. 5References

SPI: Serial Peripheral Interface

SPI is a synchronous serial communication interface specification used for short-distance communication, primarily in embedded systems.

Salient features of SPI protocol are listed below:

  • Serial interface
  • Synchronous
  • Master-slave configuration
  • Data Exchange - DMA/PIO

The SPI bus specifies four logic signals:

  • SCLK: Serial Clock (output from master)
  • MOSI: Master Out Slave In (data output from master)
  • MISO: Master In Slave Out (data output from slave)
  • CS /SS: Chip/Slave Select (often active low, output from master to indicate that data is being sent)

MOSI on a master connects to MOSI on a slave. MISO on a master connects to MISO on a slave.

Slave Select has the same functionality as chip select and is used instead of an addressing concept.

Figure 1-1 Missing Title