SPRADA3 july   2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Device Nomenclature
  6. 3 R5 Cores and TCM in AM263x
    1. 3.1 R5 Core Nomenclature in Am263x
  7. 4 Example Support for AM263x Family
  8. 5 IPC Example Support for Two-Core Devices (AM2632)
    1. 5.1 Option 1 Using MulticoreImageGen.js
    2. 5.2 Option Two (Migration Guide from a Four-Core System Project to a Two-Core System Project)
  9. 6 System Project Example Support for Two-Core Devices (AM2632)
  10. 7 Target Configuration in CCS
    1. 7.1 Prerequisites
    2. 7.2 Creating a Target Configuration
  11. 8 Connecting to the Target Core
  12. 9 Hardware Description for Launch Pad and Control Card
    1. 9.1 Launchpad Pinout for Standard Analog Devices
    2. 9.2 ADC and DAC Mapping in Launchpad for Standard Analog
    3. 9.3 Pinmux Mapping - Standard Analog - Launch Pad
    4. 9.4 ADC and DAC Mapping in Control Card for Standard Analog
  13. 10Summary
  14. 11References

9.3 Pinmux Mapping - Standard Analog - Launch Pad

The various pinmux options for the BoosterPack connector pins are given in Table 9-2.

Table 9-2 Pinmux Options for J1

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J1.1

3V3

J1.2

ADC0_AIN3

J1.3

UART1_RXD

LIN1_RXD

EPWM16_A

GPMC0_AD6

GPIO75

J1.4

UART1_TXD

LIN1_TXD

EPWM16_B

GPMC0_AD7

GPIO76

J1.5

PR0_PRU0_GPIO12

RMII2_TXD1

RGMII2_TD1

MII2_TXD1

EPWM28_B

GPMC0_A8

GPIO100

J1.6

ADC1_AIN3

J1.7

SPI0_CLK

UART3_TXD

LIN3_TXD

FSITX0_CLK

GPIO12

PR0_PRU0_GPIO16

RGMII2_TXC

MII2_TXCLK

EPWM27_A

GPMC0_A5

GPIO97

J1.8

PR0_PRU0_GPIO10

RMII2_CRS_DV

PR0_UART0_RTSn

MII2_CRS

EPWM23_A

GPMC0_WAIT0

GPIO89

J1.9

EPWM8_B

UART4_RXD

I2C3_SCL

FSITX2_DATA0

GPIO60

J1.10

EPWM8_A

UART4_TXD

I2C3_SDA

FSITX2_CLK

GPIO59
Table 9-3 Pinmux Options for J2

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J2.11

EPWM0_A

GPIO43

J2.12

PR0_PRU0_GPIO15

RMII2_TX_EN

RGMII2_TX_CTL

MII2_TX_EN

EPWM27_B

GPMC0_A6

GPIO98

J2.13

PR0_PRU0_GPIO5

RMII2_RX_ER

MII2_RX_ER

EPWM22_A

GPMC0_DIR

GPIO87

J2.14

SPI0_D1

FSITX0_DATA1

GPIO14

PR0_PRU0_GPIO14

RGMII2_TD3

MII2_TXD3

EPWM29_B

GPMC0_A10

GPIO102

J2.15

SPI0_D0

FSITX0_DATA0

GPIO13

PR0_PRU0_GPIO13

RGMII2_TD2

MII2_TXD2

EPWM29_A

GPMC0_A9

GPIO101

J2.16

PORz

J2.17

PR0_PRU0_GPIO4

RGMII2_RX_CTL

MII2_RXDV

EPWM24_B

GPMC0_A0

GPIO92

J2.18

SPI0_CS0

UART3_RXD

LIN3_RXD

GPIO11

PR0_PRU0_GPIO8

EPWM23_B

GPMC0_WPn

GPIO90

J2.19

PR0_PRU0_GPIO3

RGMII2_RD3

MII2_RXD3

EPWM26_B

GPMC0_A4

GPIO96

J2.20

GND
Table 9-4 Pinmux Options for J3

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J3.21

5 V

J3.22

GND

J3.23

ADC0_AIN0

J3.24

ADC1_AIN0

J3.25

ADC2_AIN0

J3.26

ADC3_AIN0

J3.27

ADC4_AIN0

J3.28

ADC0_AIN1

J3.29

ADC1_AIN1

J3.30

DAC_OUT
Table 9-5 Pinmux Options for J4

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J4.31

PR0_PRU0_GPIO2

RGMII2_RD2

MII2_RXD2

EPWM26_A

GPMC0_A3

GPIO95

J4.32

PR0_PRU0_GPIO1

RMII2_RXD1

RGMII2_RD1

MII2_RXD1

EPWM25_B

GPMC0_A2

GPIO94

J4.33

PR0_PRU0_GPIO0

RMII2_RXD0

RGMII2_RD0

MII2_RXD0

EPWM25_A

GPMC0_A1

GPIO93

J4.34

EPWM15_A

UART5_TXD

MII1_COL

GPMC0_AD4

GPIO73

J4.35

EPWM14_A

UART1_DSRn

GPMC0_AD2

GPIO71

J4.36

EPWM14_B

MII1_RX_ER

GPMC0_AD3

GPIO72

J4.37

EPWM1_A

GPIO45

J4.38

EPWM1_B

GPIO46

J4.39

EPWM2_A

GPIO47

J4.40

EPWM2_B

GPIO48
Table 9-6 Pinmux Options for J5

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J5.41

3 V

J5.42

ADC2_AIN3

J5.43

LIN2_RXD

UART2_RXD

SPI2_D0

GPIO21

PR0_PRU0_GPIO11

RMII2_TXD0

RGMII2_TD0

MII2_TXD0

EPWM28_A

GPMC0_A7

GPIO99

J5.44

LIN2_TXD

UART2_TXD

SPI2_D1

GPIO22

PR0_PRU0_GPIO9

PR0_UART0_CTSn

MII2_COL

EPWM22_B

GPMC0_CLK

GPIO88

J5.45

EPWM15_B

UART5_RXD

MII1_CRS

GPMC0_AD5

GPIO74

J5.46

ADC3_AIN3

J5.47

SPI1_CLK

UART4_RXD

LIN4_RXD

XBAROUT2

FSIRX0_CLK

GPIO16

J5.48

PR0_PRU0_GPIO6

RMII2_REF_CLK

RGMII2_RXC

MII2_RXCLK

EPWM24_A

GPMC0_CSn1

GPIO91

J5.49

I2C1_SCL

SPI3_CS0

XBAROUT7

GPIO23

J5.50

I2C1_SDA

SPI3_CLK

XBAROUT8

GPIO24
Table 9-7 Pinmux Options for J6

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J6.51

EPWM11_A

UART2_CTSn

GPMC0_CLKLB

GPIO65

J6.52

EPWM11_B

UART3_RTSn

GPMC0_OEn_REn

GPIO66

J6.53

EPWM12_A

UART3_CTSn

SPI4_CS1

GPMC0_WEn

GPIO67

J6.54

SPI1_D1

UART5_RXD

XBAROUT4

FSIRX0_DATA1

GPIO18

J6.55

SPI1_D0

UART5_TXD

XBAROUT3

FSIRX0_DATA0

GPIO17

J6.56

PORz

J6.57

EPWM12_B

UART1_DCDn

GPMC0_CSn0

GPIO68

J6.58

SPI1_CS0

UART4_TXD

LIN4_TXD

XBAROUT1

GPIO15

J6.59

EPWM0_B

GPIO44

J6.60

GND
Table 9-8 Pinmux Options for J7

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J7.61

5 V

J7.62

GND

J7.63

ADC2_AIN1

MCAN1_RX

SPI4_D0

GPIO9

J7.64

ADC3_AIN1

MCAN1_TX

SPI4_D1

GPIO10

J7.65

ADC4_AIN1

LIN1_RXD

UART1_RXD

SPI2_CS0

XBAROUT5

GPIO19

J7.66

ADC0_AIN2

LIN1_TXD

UART1_TXD

SPI2_CLK

XBAROUT6

GPIO20

J7.67

ADC1_AIN2

UART5_RXD

GPIO127

SDFM0_D2

J7.68

ADC2_AIN2

UART5_TXD

I2C3_SCL

GPMC0_ADVn_ALE

GPIO126

SDFM0_CLK2

J7.69

ADC3_AIN2

MCAN3_RX

GPIO129

SDFM0_D3

J7.70

DAC_OUT

MCAN3_TX

UART5_RXD

GPIO128

SDFM0_CLK3
Table 9-9 Pinmux Options for J8

Pin#

Mode0

Mode1

Mode2

Mode3

Mode4

Mode5

Mode6

Mode7

Mode8

Mode9

J8.71

PR0_PRU1_GPIO18

UART3_TXD

PR0_IEP0_EDIO_DATA_IN_OUT31

TRC_CTL

XBAROUT14

GPMC0_WAIT1

GPIO120

EQEP1_B

J8.72

PR0_PRU1_GPIO19

UART3_RXD

PR0_IEP0_EDC_SYNC_OUT0

TRC_CLK

XBAROUT13

GPIO119

EQEP1_A

J8.73

PR0_PRU1_GPIO17

UART5_CTSn

PR0_IEP0_EDIO_DATA_IN_OUT30

GPIO125

SDFM0_D1

J8.74

PR0_PRU1_GPIO7

CPTS0_TS_SYNC

UART5_RTSn

PR0_IEP0_EDC_SYNC_OUT1

I2C3_SDA

GPIO124

SDFM0_CLK1

J8.75

EPWM9_A

FSITX2_DATA1

GPIO61

J8.76

EPWM9_B

UART1_RTSn

FSIRX2_CLK

GPIO62

J8.77

EPWM3_A

GPIO49

J8.78

EPWM3_B

GPIO50

J8.79

EPWM13_A

UART1_RIn

GPMC0_AD0

GPIO69

J8.80

EPWM13_B

UART1_DTRn

GPMC0_AD1

GPIO70