SPRADG1 February   2024 AM625 , AM625-Q1 , AM625SIP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Active Power Consumption Summary
  5. 2Low Power Consumption Summary
  6. 3Introduction
    1. 3.1 Testing Conditions and Parameters
    2. 3.2 Starter Kit EVM Information
    3. 3.3 Starter Kit EVM Power Rails
  7. 4Power Measurement Data
    1. 4.1 Low-Power Modes
      1. 4.1.1 OS Idle
        1. 4.1.1.1 OS Idle Setup
        2. 4.1.1.2 OS Idle Data
          1. 4.1.1.2.1 OS Idle at 200MHz
          2. 4.1.1.2.2 OS Idle at 400MHz
          3. 4.1.1.2.3 OS Idle at 600MHz
          4. 4.1.1.2.4 OS Idle at 800MHz
          5. 4.1.1.2.5 OS Idle at 1000MHz
          6. 4.1.1.2.6 OS Idle at 1250MHz
          7. 4.1.1.2.7 OS Idle at 1400MHz
      2. 4.1.2 Deep Sleep
        1. 4.1.2.1 Deep Sleep Setup
        2. 4.1.2.2 Deep Sleep Data
      3. 4.1.3 MCU Only
        1. 4.1.3.1 MCU Only Setup
        2. 4.1.3.2 MCU Only Data
    2. 4.2 Core Benchmarks
      1. 4.2.1 Dhrystone
        1. 4.2.1.1 Dhrystone Setup
        2. 4.2.1.2 Dhrystone Data
          1. 4.2.1.2.1 1-Core Dhrystone Data
          2. 4.2.1.2.2 2-Core Dhrystone Data
          3. 4.2.1.2.3 4-Core Dhrystone Data
      2. 4.2.2 Whetstone
        1. 4.2.2.1 Whetstone Setup
        2. 4.2.2.2 Whetstone Data
          1. 4.2.2.2.1 1-Core Whetstone Data
          2. 4.2.2.2.2 2-Core Whetstone Data
          3. 4.2.2.2.3 4-Core Whetstone Data
      3. 4.2.3 Stress-ng
        1. 4.2.3.1 Stress-ng Setup
        2. 4.2.3.2 Stress-ng Data
          1. 4.2.3.2.1 1-Core Stress-ng Data
          2. 4.2.3.2.2 2-Core Stress-ng Data
          3. 4.2.3.2.3 4-Core Stress-ng Data
    3. 4.3 Memory Benchmark
      1. 4.3.1 Stream
        1. 4.3.1.1 Stream Setup
        2. 4.3.1.2 Stream Data
          1. 4.3.1.2.1 1-Core Stream Data
          2. 4.3.1.2.2 2-Core Stream Data
          3. 4.3.1.2.3 4-Core Stream Data
    4. 4.4 Networking/Cryptography Benchmark
      1. 4.4.1 OpenSSL
        1. 4.4.1.1 OpenSSL Setup
        2. 4.4.1.2 OpenSSL Data
          1. 4.4.1.2.1 1-Core OpenSSL Data
          2. 4.4.1.2.2 2-Core OpenSSL Data
          3. 4.4.1.2.3 4-Core OpenSSL Data
    5. 4.5 Graphics Example Use Case
      1. 4.5.1 glmark2
        1. 4.5.1.1 glmark2 Setup
        2. 4.5.1.2 glmark2 Data
    6. 4.6 High Activity Concurrency Tests
      1. 4.6.1 4-Core Dhrystone + glmark2
        1. 4.6.1.1 4-Core Dhrystone + glmark2 Setup
        2. 4.6.1.2 4-Core Dhrystone + glmark2 Data
      2. 4.6.2 4-Core Stress-ng + glmark2
        1. 4.6.2.1 4-Core Stress-ng + glmark2 Setup
        2. 4.6.2.2 4-Core Stress-ng + glmark2 Data
      3. 4.6.3 4-Core Stream + glmark2
        1. 4.6.3.1 4-Core Stream + glmark2 Setup
        2. 4.6.3.2 4-Core Stream + glmark2 Data
    7. 4.7 Application Demos
      1. 4.7.1 HMI Demo
        1. 4.7.1.1 HMI Demo Setup
        2. 4.7.1.2 HMI Demo Data
      2. 4.7.2 DMS Demo
        1. 4.7.2.1 DMS Demo Setup
        2. 4.7.2.2 DMS Demo Data
  8. 5Limitations
    1. 5.1 Low Power Mode Measurement Discrepancy
    2. 5.2 Measurement Methods
    3. 5.3 Starter Kit EVM I/O Rails
  9. 6References
  10.   Appendix
    1.     A.1 Summary Table
    2.     A.2 How to Change the A53 Core Speed
4.2.1.2.1 1-Core Dhrystone Data
0.85V VDD_CORE DDR4 0.75V VDD_CORE DDR4 0.85V VDD_CORE LPDDR4 0.75V VDD_CORE LPDDR4
EVM VDD Rail Rail Voltage Power (mW) Power (mW) Power (mW) Power (mW)
VDD_CORE 0.75V/0.85V 710.95 488.40 616.97 451.32
VDDR_CORE 0.85V N/A N/A 3.94 3.96
VDD_LPDDR4/VDD_DDR4 1.1V/1.2V 74.99 76.22 58.59 58.94
SoC_DVDD1V8 1.8V and 3.3V 70.22 72.69 104.85 105.40
SoC_DVDD3V3
VDDA_CORE 1.8V 52.30 53.61 53.72 55.93
Total Power 908.45 690.92 838.07 675.55