10 Revision History
Changes from August 28, 2021 to April 22, 2024 (from Revision J (August 2021) to Revision K (April 2024))
-
Global:: Updated document titleGo
-
Global: Added Silicon Revision 2.0 (SR2.0) device-specific
info throughout the documentGo
-
Global:: Moved the Revision History section to the back of
the documentGo
-
Global:: Deleted all OLDI/LVDS content; n/a to this device
suiteGo
-
Global:: Deleted the "Power Consumption Summary" section
(was after Section 6.5, Operating Performance
Points)Go
- (Features): Updated/Changed the Integrated Ethernet switch bullets
and sub-bulletsGo
- (Features): Updated/Changed the Functional Safety bullets to include
the received Functional Safety-Compliant certificationGo
- (Description): Updated the lead-in sentenceGo
- (Package Information): Updated/Changed the "Device Information"
table to "Package Information" table and revamped table content to new
formatGo
- (Functional Block Diagram): Added SDK software build sheet
NoteGo
- (Device Comparison): Updated/Changed the MSMC capacity for
DRA829VM to "8MB". Now both DRA829JM and DRA829VM devices are "8MB
(On-Chip SRAM with ECC)"Go
- (Device Comparison): Moved the "Security Accelerators" row to be
group sequenced with the other accelerator rows and to match other device
comparison tables within this device suiteGo
- (Device Comparison): Added SDK software build sheet
NoteGo
- (Pin Attributes): Added the secondary pin multiplexing functions for
the DSI and controlled by CTRLMMR regsGo
- (Pin Attributes): Added the secondary pin multiplexing functions for
the MCU_ADC and controlled by CTRLMMR regsGo
- (Pin Attributes): Added "The MUXMODE field is not used to select …"
footnote for the WKUP_GPIO0_[68:83] signals in the Pin Attributes
tableGo
- (Pin Attributes): Added reset states to the BALL RESET STATE column
for mmc0_* pins in the Pin Attributes tableGo
- (WKUP Domain GPIO0 Signal Descriptions): Added missing
WKUP_GPIO0_[68:83] signalsGo
- (Power Supply Signal Description): Added "±10%" to the "This pin
must always be … capacitor to VSS" footnoteGo
- (Connections for Unused Pins): Added the "VMON_ER_VSYS" (M26) and
"VMON_IR_VEXT" (V19) signals to the "Each of these balls must be connected to
VSS .." CONNECTIONS REQUIREMENT descriptionGo
- (Connections for Unused Pins): Updated/Changed "All VMON and power
balls must be …" Note deleting "VMON and"Go
- (Pin Connectivity Requirements): Updated/Changed the section title
(was "Connections for Unused Pins")Go
- (Connectivity Requirements (ALF Package)): Updated/Changed the table
title (was "Unused Balls Specific Connection
Requirements")Go
- (Pin Connectivity Requirements): Added "as a boot source" to the
Note specifying MMC1_SDCD and MMC2_SDCD should be pulled down to work
properlyGo
- (Absolute Maximum Ratings): Moved "VMON_IR_VEXT" and
"VMON_ER_VSYS"signals
from
"Steady State Max. Voltage at all other
IO pins"
to
"Steady State Max. Voltage at all fail-safe IO
pins"Go
- Added the "VMON_IR_VEXT" and "VMON_ER_VSYS"signals to the "Fail-safe
IO terminals are designed …" paragraphGo
- (Absolute Maximum Ratings): Updated/Changed "JESD78D (Class II)" to
" JESD78E (Class II)" in the "For current pulse injection: .."
footnoteGo
- Updated/Changed the UNIT specified for the Latch-Up Performance MAX
parameter from "mV" to "V"Go
- (ESD Ratings): Added the AEC - Q100 document revision letter to both
HBM and CDM rowsGo
- (Recommended Operating Conditions): Deleted the "Refer to
Power-On-Hour (POH) Limits for limitations." footnote and associated
cross-referenceGo
- (I2C, Open-Drain, Fail-Safe (I2C OD FS) Electrical Characteristics):
Updated/Changed the VOL, Output low-level voltage MAX value under
the 3.3-V MODE from "0.4 × VDDSHV" to "0.4" VGo
- (I2C OD FS Electrical Characteristics): Added a footnote to explain
the IOL parameterGo
- (I2C OD FS Electrical Characteristics): Defined MAX VIH
values for 1.8-V mode and 3.3-V mode and included a footnote that describes how
these values are also defined in the absolute maximum input
voltageGo
- (I2C OD FS Electrical Characteristics): Added the MIN input slew
rate value and added associated footnotes to describe the SRI
parameter for 1.8-V MODEGo
- (I2C OD FS Electrical Characteristics): Added both the MIN and MAX
input slew rate value and added associated footnotes to describe the
SRI parameter for 3.3-V MODEGo
- (I2C OD FS Electrical Characteristics): Added associated "I2C
Hs-mode is not supported …" footnote to the 3.3-V MODE table
sectionGo
- (I2C OD FS Electrical Characteristics): Added associated "The
IOL parameter defines …" footnote to the IOL, low
level output current parameter for both 1.8-V MODE and 3.3-V
MODEGo
- (SDIO Electrical Characteristics): Added the MIN input slew rate
value and added associated footnotes to describe the SRI parameter
for 1.8-V MODEGo
- (SDIO Electrical Characteristics): Added both the MIN and MAX input
slew rate value and added associated footnotes to describe the SRI
parameter for 3.3-V MODEGo
- (CSI-2/DSI D-PHY Electrical Characteristics): Updated the section
titleGo
- (CSI-2/DSI D-PHY Electrical Characteristics): Deleted the Electrical
Characteristics table and added a Note for the CSI-2/DSI D-PHY interfaces
electrical characteristics compliance with MIPI D-PHY specifications v1.2 dated
August 1, 2014Go
- (LVCMOS Electrical Characteristics): Added a footnote to explain the
IOL and IOH parametersGo
- (LVCMOS Electrical Characteristics): Added the MIN input slew rate
value and added associated footnotes to describe the SRI parameter
for 1.8-V MODEGo
- (LVCMOS Electrical Characteristics): Added both the MIN and MAX
input slew rate value and added associated footnotes to describe the
SRI parameter for 3.3-V MODEGo
- (LVCMOS Electrical Characteristics): Defined the minimum input slew
rate value and added notes to describe this parameterGo
- (SerDes 4-L-PHY/2-L-PHY Electrical Characteristics):
Updated/Changed the section titleGo
- (2-L-PHY SERDES REFCLK Electrical Characteristics):
Added missing tableGo
- (UFS M-PHY Electrical Characteristics): Added missing section
titleGo
- (eDP/DP AUX-PHY Electrical Characteristics): Added missing section
titleGo
- (WKUP_OSC0 Switching Characteristics – Crystal Mode):
Updated/Changed CXIXO, XI to XO Mutual Capacitance MAX value
from "0.9fF" to "0.1pF"Go
- (WKUP_LFOSC0 Internal Oscillator Clock Source): Updated/Changed the
ESR row UNIT column from "Ω" to "kΩ" in the WKUP_LFOSC0 Crystal Electrical
Characteristics tableGo
- (LFXOSC Modes of Operation table): Updated/Changed the value of PD_C
for BYPASS mode from "X" to "0"Go
- (DDRSS): Added a bullet below the JEDEC JESD209-4B standard
compliant LPDDR4 SDRAM devices features currently supported
bulletsGo
- (GPIO): Updated/Changed the GPIO Timings Conditions table and
associated footnoteGo
- (GPIO Timing Requirements): Updated/Changed the GPIO Timings
Requirements tableGo
- (GPIO Switching Characteristics): Updated/Changed the GPIO Switching
Characteristics tableGo
- (MMC1/2 - SD/SDIO Interface): Updated/Changed the "OTAPDLYENA, DELAY
ENABLE" and "OTAPDLYSEL, DELAY VALUE" for the Default Speed and High Speed modes
from "0x0" to "0x1"Go
- (OSPI DLL Delay Mapping - DDR Timing Modes): Updated/Changed the
DELAY VALUES for both OSPI0 and OSPI1 and re-worked the Table formatting
viewGo
- (OSPI Tap Mode): Added new sectionGo
- (OSPI Timing Requirements – Tap SDR Mode): Added new
sectionGo
- (OSPI Timing Requirements – Tap DDR Mode): Added new
sectionGo
- (Nomenclature Description): Added "C" value to the "r, Device
revision" row to represent SR 2.0 partsGo
- (Device Naming Convention): Added content to the "Base production
part number" Values plus Description and "Device Type" Description columns of
the Nomenclature Description tableGo
- (Tools and Software/Development Tools): Deleted the Clock Tree Tool
reference and contentGo
- (Documentation Support): Updated/Changed the document titles for both the
TRM and Errata to include Silicon Revisions 2.0, 1.1, and still 1.0Go