SPRSP65G April 2021 – May 2024 AM2431 , AM2432 , AM2434
PRODUCTION DATA
PARAMETER | MIN | MAX | UNIT | |
---|---|---|---|---|
VDD_CORE | Core supply | -0.3 | 1.05 | V |
VDDR_CORE | RAM supply | -0.3 | 1.05 | V |
VDD_MMC0 | MMC0 PHY core supply | -0.3 | 1.05 | V |
VDD_DLL_MMC0 | MMC0 PLL analog supply | -0.3 | 1.05 | V |
VDDA_0P85_SERDES0 | SERDES0 0.85V analog supply | -0.3 | 1.05 | V |
VDDA_0P85_SERDES0_C | SERDES0 clock 0.85V analog supply | -0.3 | 1.05 | V |
VDDA_0P85_USB0 | USB0 0.85V analog supply | -0.3 | 1.05 | V |
VDDS_DDR | DDR PHY IO supply | -0.3 | 1.57 | V |
VDDS_DDR_C | DDR clock IO supply | -0.3 | 1.57 | V |
VDDS_MMC0 | MMC0 PHY IO supply | -0.3 | 1.98 | V |
VDDS_OSC | MCU_OSC0 supply | -0.3 | 1.98 | V |
VDDA_MCU | POR and MCU PLL analog supply | -0.3 | 1.98 | V |
VDDA_ADC0 | ADC0 analog supply | -0.3 | 1.98 | V |
VDDA_PLL0 | Main, PER1, and R5F PLL analog supply | -0.3 | 1.98 | V |
VDDA_PLL1 | ARM and DDR PLL analog supply | -0.3 | 1.98 | V |
VDDA_PLL2 | PER0 PLL analog supply | -0.3 | 1.98 | V |
VDDA_1P8_SERDES0 | SERDES0 1.8V analog supply | -0.3 | 1.98 | V |
VDDA_1P8_USB0 | USB0 1.8V analog supply | -0.3 | 1.98 | V |
VDDA_TEMP0 | TEMP0 analog supply | -0.3 | 1.98 | V |
VDDA_TEMP1 | TEMP1 analog supply | -0.3 | 1.98 | V |
VPP | eFuse ROM programming supply | -0.3 | 1.98 | V |
VDDSHV_MCU | IO supply for IO MCU | -0.3 | 3.63 | V |
VDDSHV0 | IO supply for IO group 0 | -0.3 | 3.63 | V |
VDDSHV1 | IO supply for IO group 1 | -0.3 | 3.63 | V |
VDDSHV2 | IO supply for IO group 2 | -0.3 | 3.63 | V |
VDDSHV3 | IO supply for IO group 3 | -0.3 | 3.63 | V |
VDDSHV4 | IO supply for IO group 4 | -0.3 | 3.63 | V |
VDDSHV5 | IO supply for IO group 5 | -0.3 | 3.63 | V |
VDDA_3P3_USB0 | USB0 3.3V analog supply | -0.3 | 3.63 | V |
VDDA_3P3_SDIO | SDIO 3.3V analog supply | -0.3 | 3.63 | V |
Steady-state max voltage at all fail-safe IO pins | MCU_PORz | -0.3 | 3.63 | V |
MCU_I2C0_SCL, MCU_I2C0_SDA, I2C0_SCL, I2C0_SDA, EXTINTn | -0.3 | 1.98(3) | V | |
VMON_1P8_MCU, VMON_1P8_SOC | -0.3 | 1.98(3) | V | |
VMON_3P3_MCU, VMON_3P3_SOC | -0.3 | 3.63 | V | |
VMON_VSYS(4) | -0.3 | 1.98 | V | |
Steady-state max voltage at all other IO pins(5) | USB0_VBUS(6) | -0.3 | 3.6 | V |
USB0_ID(7) | -0.3 | 3.6 | V | |
All other IO pins | -0.3 | IO Supply Voltage + 0.3 |
V | |
Transient overshoot and undershoot at IO pin | 20% of IO supply voltage for up to 20% of the signal period (see Figure 6-1, IO Transient Voltage Ranges) | 0.2 × VDD(8) | V | |
Latch-up performance | I-Test(9) | -100 | +100 | mA |
Over-Voltage (OV) Test(10) | 1.5 x VDD(8) | V | ||
TSTG | Storage temperature(11) | -55 | +150 | °C |
Fail-safe IO terminals are designed without any dependencies on the respective IO power supply voltage. This allows external voltage sources to be connected to these IO terminals when the respective IO power supplies are turned off.
MCU_I2C0_SCL, MCU_I2C0_SDA, I2C0_SCL, I2C0_SDA, EXTINTn, VMON_1P8_MCU, VMON_1P8_SOC, VMON_3P3_MCU, VMON_3P3_SOC, and MCU_PORz are the only fail-safe IO terminals. All other IO terminals are not fail-safe and the voltage applied to them should be limited to the value defined by the Steady state max voltage at all IO pins parameter in Section 6.1.