SPRT759A October   2023  – June 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4.   Introduction
  5.   Overview of IEC 60730 and UL 1998 Classifications
    1.     C2000 Capability by Device Family
  6.   C2000 Safety Collateral
    1.     Getting Started
    2.     Functional Safety Manuals
    3.     Software Collateral
  7.   Implementing Acceptable Measures on C2000 Real-Time MCUs
    1.     Implementation Steps
    2.     Example Mapping
    3.     Additional Best Practices
  8.   Mapping Acceptable Control Measures to C2000 Unique Identifiers
    1.     Unique Identifier Reference
    2.     CPU Related Faults
    3.     Interrupt Related Faults
    4.     Clock Related Faults
    5.     Memory Related Faults
    6.     Internal Data Path Faults
    7.     Input/Output Related Faults
    8.     Communication, Monitoring Devices, and Custom Chip Faults
  9.   Glossary
  10.   References

Example Mapping

Table 5 shows examples of mapping acceptable measures to C2000 Unique IDs. The specifications give the option to use one or more acceptable measures for the given class. It is up to the system designer to determine what is best suited for the application. In addition, a class C measure can be used to detect a class B fault/error. In example 1, the system designer could also use the acceptable measures for class C shown in example 2.

Table 5 Examples of Mapping to Unique IDs and Implementation Guidance
Example Acceptable Measure to C2000 Unique ID 1 Implementation Guidance (FSM)
Example 1:

Component: CPU registers
Device: F28003x
Class: B fault "Stuck at"		 Maps to unique IDs for the measure "periodic self-test":
  • CPU2: CPU hardware built-in self test (HWBIST)
  • CLA2: Software test of CLA

Note: The specifications indicate that a class C measure can also be selected to cover a class B fault.		 The FSM describes:
  • Diagnostic coverage information.
  • How testing can be applied to check the integrity of each CPU
  • Details on implementing the test
  • Refers the developer to the diagnostic and self-test software documentation.
Example 2:

Component: CPU registers
Device: F28003x
Class: C fault "DC fault"		 Maps to the IDs:
  • CPU1/CLA1: Reciprocal comparison by software for the acceptable measure "reciprocal comparison"
  • CPU2: CPU hardware built-in self-test (HWBIST) for the acceptable measure "internal error detection"
 The FSM:
  • Describes the HWBIST hardware feature.
  • Provides ideas for implementing reciprocal comparison. This diagnostic is highly system dependent.
  • Refers the developer to the diagnostic software documentation for the HWIBST software interface.
  1. For more information, see the tables in Mapping Acceptable Control Measures to C2000 Unique Identifiers.