SPRUIU9B August 2020 – September 2022 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SJ-Q1
In Figure 5-1, the steps that occur prior to the LFU switchover are depicted: download firmware and program Flash bank, LFU Compiler Initialization routine (the function __TI_auto_init_warm()), then LFU specific initializations in main() (the function init_lfu()).
Figure 5-2 illustrates the actual LFU switchover. The topmost waveform (00) represents the LFU switchover, the second waveform (01) represents the ISR CPU load (80% for old firmware and 40% for new firmware), and the bottom waveform (03) represents the regulated output voltage. The switchover occurs in 0.6 µs (or 72 CPU clock cycles), which includes function calls and GPIO set/reset times. Switchover occurs about 40 cycles after the ISR ends. It takes about 20 cycles to exit the ISR, and then about 15 cycles to exit the loop that is waiting for the optimal time to switchover.
This application note demonstrates the systematic implementation of LFU for real-time control applications and specifically high availability systems needing operation without downtime. Switchover to new firmware is able to be completed within 10s of CPU clock cycles with the available LFU building blocks, including a novel application LFU software flow, hardware LFU support, and Compiler LFU support.