SPRUIY3 February 2023 TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
This section covers migration between F28002x, F280013x, and F280015x for new and existing PCBs using 80-Pin PN, 64-Pin PM and 48-Pin PT or PHP packages.
Pin No | Pin Name | Action | |||||||
---|---|---|---|---|---|---|---|---|---|
80 PN |
64 PM/ VPM |
48 PT/ PHP |
32 RHB |
F28002x | F280015x | F280013x (64 VPM) |
F280013x | For Compatibility | |
Minor Incompatibility - Signals in Common(1) | |||||||||
4 | 2 | 2 | - | GPIO28 | A16, C16 GPIO28 | Use GPIO28 | |||
10 | 6 | 4 | - | A6 | A6, GPIO228 | Use A6 | |||
11 | 7 | - | C6 | C6, GPIO226 | Use C6 | ||||
12 | 8 | 5 | - | A3, C5, VDAC | A3, C5, GPIO242 | Use A3 or C5 | |||
13 | 9 | 6 | - | A2, C9 | A2, C9, GPIO224 | Use A2 or C9 | |||
- | - | 7 | - | A15, C7 | A14, A15, C4, C7 | Use A15 or C7 | |||
19 | 15 | 11 | - | A0, C15 | A0, C15, CMP1_DACL | Use A0 or C15 | |||
28 | 24 | 20 | - | A9, C8 | A9, C8, GPIO227 | Use A9 or C8 | |||
29 | 25 | 21 | - | A10, C10 | A10, C10, GPIO230 | Use A10 or C10 | |||
35 | 29 | 23 | - | GPIO13 | A19, C19, GPIO13 | Use GPIO13 | |||
36 | 30 | 24 | - | GPIO12 | A20, C20, GPIO12 | Use GPIO12 | |||
Major Incompatibility - Different Signals and Types | |||||||||
- | - | PAD | - | - | PAD | - | The 48-pin F280015x has a PowerPADTM while the 48-pin F28002x and F280013x do not. The PowerPADTM must be accounted for in board layout when considering migrating between devices. | ||
- | 27 | 22 | - | VDD | A17, C17, GPIO20 | If using a F280013x/15x device in a F28002x board, the VDD pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.If using F28002x in a F280013x/15x board, the GPIO pin is now a VDD pin and must be tied to VDD. | |||
31 | - | - | - | VDD | GPIO48 | - | If using a F280015x device in a F28002x board, the VDD pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.If using F28002x in a F280015x board, the GPIO pin is now a VDD pin and must be tied to VDD. | ||
- | 28 | - | - | VDDIO | A18, C18, GPIO21 | If using a F280013x/15x device in a F28002x board, the VDDIO pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.If using F28002x in a F280013x/15x board, the GPIO pin is now a VDDIO pin and must be tied to VDDIO. | |||
32 | - | - | - | VDDIO | GPIO49 | - | If using a F280015x device in a F28002x board, the VDDIO pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.If using F28002x in a F280015x board, the GPIO pin is now a VDDIO pin and must be tied to VDDIO. | ||
33 | - | - | - | FLT2 | A17, C17, GPIO20 | If using a F280013x/15x device in a F28002x board, the FLT pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.If using F28002x in a F280013x/15x board, the GPIO pin is now a FLT pin and must be left unconnected. | |||
34 | - | - | - | FLT1 | A18, C18, GPIO21 | ||||
56 | 46 | - | - | GPIO39 | VREGENZ | VREGENZ | GPIO39 | F28002x and F280013x (except for 64 VPM package) do not have a VREGENZ pin, as the internal VREG is always enabled.If using a VREGENZ device in a F28002x/13x board, tie the GPIO to VDDIO to use an external supply or tie the GPIO to VSS to use the internal VREG.If using a F28002x/13x device in a board for a device with VREGENZ, the VREGENZ pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.For additional information on external and internal supplies, see the device-specific data sheet. | |
- | - | - | 25 | - | GPIO4 | ||||
- | - | 37 | - | VSS | VREGENZ | VSS | F28002x and F280013x (except for 64 VPM package) do not have a VREGENZ pin, as the internal VREG is always enabled.If using a VREGENZ device in a F28002x/13x board, tie the VSS pin trace (now VREGENZ) to VDDIO to use an external supply or keep the VSS pin tied to VSS (no change) to use the internal VREG.If using a F28002x/13x device in a board for a device with VREGENZ, the VREGENZ pin trace (now VSS) should be tied to VSS.For additional information on external and internal supplies, see device-specific data sheet. | ||
- | - | 44 | - | VSS | GPIO44 | VSS | F280015x has a PowerPADTM while F28002x and F280013x do not. VSS pins get replaced with other functions for F280015x. The PowerPADTM must be accounted for in board layout when considering migrating between 48-pin devices.If using F280015x in a F28002x/13x board, the VSS pin can be used as a GPIO or you can follow the unused pins practice for GPIOs found in the device-specific data sheet.If using F28002x/13x in a F280015x board, the GPIO pin has been replaced by VSS so that pin should be tied to VSS. |